drm/i915/tgl: add support for reading the timestamp frequency

There are no changes with respect to GEN11, which Paulo wrote.

This gets rid of the "Missing switch case in read_timestamp_frequency"
message at boot for Tiger Lake.

[ Lucas: BSpec: 10742 and 9024, but there's a mismatch on the values.
  Let's say a glitch in the spec. Tested locally and it works. ]

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190817093902.2171-3-lucas.demarchi@intel.com

diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 2a39b52c35820e38911214e3a938537b60a211c7..d0ed44d3348429b7baae74331c8fb5bc575eae55 100644 (file)
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -716,7 +716,7 @@ static u32 read_timestamp_frequency(struct drm_i915_private *dev_priv)
                }
 
                return freq;
-       } else if (INTEL_GEN(dev_priv) <= 11) {
+       } else if (INTEL_GEN(dev_priv) <= 12) {
                u32 ctc_reg = I915_READ(CTC_MODE);
                u32 freq = 0;