riscv: dts: Re-organize the DT nodes

As per the convention for any SOC device with external connection,
define only device DT node in SOC DTSi file with status = "disabled"
and enable device in Board DTS file with status = "okay"

Reported-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Yash Shah <yash.shah@sifive.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>

diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
index 3c06ee4b2b2992b751b946cc9b018c373ef6611d..40983491b95fd12b2e616e4a0609e1f9940a5a23 100644 (file)
--- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
+++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
@@ -163,6 +163,7 @@
                        interrupt-parent = <&plic0>;
                        interrupts = <4>;
                        clocks = <&prci PRCI_CLK_TLCLK>;
+                       status = "disabled";
                };
                uart1: serial@10011000 {
                        compatible = "sifive,fu540-c000-uart", "sifive,uart0";
@@ -170,6 +171,7 @@
                        interrupt-parent = <&plic0>;
                        interrupts = <5>;
                        clocks = <&prci PRCI_CLK_TLCLK>;
+                       status = "disabled";
                };
                i2c0: i2c@10030000 {
                        compatible = "sifive,fu540-c000-i2c", "sifive,i2c0";
@@ -181,6 +183,7 @@
                        reg-io-width = <1>;
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       status = "disabled";
                };
                qspi0: spi@10040000 {
                        compatible = "sifive,fu540-c000-spi", "sifive,spi0";
@@ -191,6 +194,7 @@
                        clocks = <&prci PRCI_CLK_TLCLK>;
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       status = "disabled";
                };
                qspi1: spi@10041000 {
                        compatible = "sifive,fu540-c000-spi", "sifive,spi0";
@@ -201,6 +205,7 @@
                        clocks = <&prci PRCI_CLK_TLCLK>;
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       status = "disabled";
                };
                qspi2: spi@10050000 {
                        compatible = "sifive,fu540-c000-spi", "sifive,spi0";
@@ -210,6 +215,7 @@
                        clocks = <&prci PRCI_CLK_TLCLK>;
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       status = "disabled";
                };
        };
 };

diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
index 4da88707e28f51da703b97a7b21a862a23680deb..0b55c53c08c7ae56a426914d3c46c8db8a5b8a4e 100644 (file)
--- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
+++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
@@ -42,7 +42,20 @@
        };
 };
 
+&uart0 {
+       status = "okay";
+};
+
+&uart1 {
+       status = "okay";
+};
+
+&i2c0 {
+       status = "okay";
+};
+
 &qspi0 {
+       status = "okay";
        flash@0 {
                compatible = "issi,is25wp256", "jedec,spi-nor";
                reg = <0>;