ipq40xx: qca807x: always set PSGMII AZ WAR

There is no point in using a DT property to trigger setting the PSGMII
PHY AZ transmitting ability.
Especially since EEE can be disabled using ethtool anyway.

Fixup the mask for setting the workaround as only BIT(0) is actually being
changed and use the phy_clear_bits_mmd helper instead of reading, then
clearing the bit and writing back as it does everything for us.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>

diff --git a/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c b/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
index d56e9f9cda8b78c6239738fde6450d739ad09bce..2a2d19d6db19afb5f1524fb4ce1788262a8b2063 100644 (file)
--- a/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
+++ b/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
@@ -121,7 +121,7 @@
 #define PSGMII_QSGMII_DRIVE_CONTROL_1                  0xb
 #define PSGMII_QSGMII_TX_DRIVER_MASK                   GENMASK(7, 4)
 #define PSGMII_MODE_CTRL                               0x6d
-#define PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK            GENMASK(3, 0)
+#define PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK            BIT(0)
 #define PSGMII_MMD3_SERDES_CONTROL                     0x805a
 
 struct qca807x_gpio_priv {
@@ -780,17 +780,14 @@ static int qca807x_probe(struct phy_device *phydev)
 static int qca807x_psgmii_config(struct phy_device *phydev)
 {
        struct device_node *node = phydev->mdio.dev.of_node;
-       int psgmii_az, tx_amp, ret = 0;
+       int tx_amp, ret = 0;
        u32 tx_driver_strength;
 
        /* Workaround to enable AZ transmitting ability */
-       if (of_property_read_bool(node, "qcom,psgmii-az")) {
-               psgmii_az = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, PSGMII_MODE_CTRL);
-               psgmii_az &= ~PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK;
-               psgmii_az |= FIELD_PREP(PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK, 0xc);
-               ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, PSGMII_MODE_CTRL, psgmii_az);
-               psgmii_az = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, PSGMII_MODE_CTRL);
-       }
+       ret = phy_clear_bits_mmd(phydev,
+                                MDIO_MMD_PMAPMD,
+                                PSGMII_MODE_CTRL,
+                                PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK);
 
        /* PSGMII/QSGMII TX amp set to DT defined value instead of default 600mV */
        if (!of_property_read_u32(node, "qcom,tx-driver-strength", &tx_driver_strength)) {

diff --git a/target/linux/ipq40xx/patches-5.10/708-arm-dts-ipq4019-QCA807x-properties.patch b/target/linux/ipq40xx/patches-5.10/708-arm-dts-ipq4019-QCA807x-properties.patch
index c08f3a83e67667ed9699c1b848d55ad241851baf..235f4419a88f3f54baa031f505799e85bf95e062 100644 (file)
--- a/target/linux/ipq40xx/patches-5.10/708-arm-dts-ipq4019-QCA807x-properties.patch
+++ b/target/linux/ipq40xx/patches-5.10/708-arm-dts-ipq4019-QCA807x-properties.patch
@@ -56,7 +56,6 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
 +                              reg = <5>;
 +
 +                              qcom,tx-driver-strength = <PSGMII_QSGMII_TX_DRIVER_300MV>;
-+                              qcom,psgmii-az;
                        };
                };
  

diff --git a/target/linux/ipq40xx/patches-5.15/708-arm-dts-ipq4019-QCA807x-properties.patch b/target/linux/ipq40xx/patches-5.15/708-arm-dts-ipq4019-QCA807x-properties.patch
index c08f3a83e67667ed9699c1b848d55ad241851baf..d978693b4f964910e44555b53ee3fb820ac58d4a 100644 (file)
--- a/target/linux/ipq40xx/patches-5.15/708-arm-dts-ipq4019-QCA807x-properties.patch
+++ b/target/linux/ipq40xx/patches-5.15/708-arm-dts-ipq4019-QCA807x-properties.patch
@@ -20,7 +20,7 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
  
  / {
        #address-cells = <1>;
-@@ -598,22 +599,39 @@
+@@ -598,22 +599,38 @@
  
                        ethphy0: ethernet-phy@0 {
                                reg = <0>;
@@ -56,7 +56,6 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
 +                              reg = <5>;
 +
 +                              qcom,tx-driver-strength = <PSGMII_QSGMII_TX_DRIVER_300MV>;
-+                              qcom,psgmii-az;
                        };
                };