drm/amd/display: Fix 64-bit division in hwss_edp_power_control

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index 52427ae42e0f7f9cb26db0201a7a21a692376b3b..68a182ce53c795d1ff45ad04c46b8020ec8a77cf 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -857,7 +857,7 @@ void hwss_edp_power_control(
                                        dm_get_elapse_time_in_ns(
                                                        ctx,
                                                        current_ts,
-                                                       link->link_trace.time_stamp.edp_poweroff) / 1000000;
+                                                       div64_u64(link->link_trace.time_stamp.edp_poweroff, 1000000));
                        unsigned long long wait_time_ms = 0;
 
                        /* max 500ms from LCDVDD off to on */