drm/nv40: attempt to reserve just enough vram for all 32 channels
authorBen Skeggs <bskeggs@redhat.com>
Tue, 8 Mar 2011 04:47:53 +0000 (14:47 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Mon, 14 Mar 2011 06:35:16 +0000 (16:35 +1000)
This also makes the fact we're giving 512MiB of GART space to all PCIE
boards explicit, although the vast majority (if not all) of them will
now have a ramin_rsvd_vram larger than 2MiB anyway.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nouveau_mem.c
drivers/gpu/drm/nouveau/nouveau_sgdma.c

index 63b9040b5f308b8321de49b1561fba3175f44133..02b48d183f4a4ffb608540643894e694395e02f1 100644 (file)
@@ -424,14 +424,32 @@ nouveau_mem_vram_init(struct drm_device *dev)
        }
 
        /* reserve space at end of VRAM for PRAMIN */
-       if (dev_priv->chipset == 0x40 || dev_priv->chipset == 0x47 ||
-           dev_priv->chipset == 0x49 || dev_priv->chipset == 0x4b)
-               dev_priv->ramin_rsvd_vram = (2 * 1024 * 1024);
-       else
-       if (dev_priv->card_type >= NV_40)
-               dev_priv->ramin_rsvd_vram = (1 * 1024 * 1024);
-       else
-               dev_priv->ramin_rsvd_vram = (512 * 1024);
+       if (dev_priv->card_type >= NV_50) {
+               dev_priv->ramin_rsvd_vram = 1 * 1024 * 1024;
+       } else
+       if (dev_priv->card_type >= NV_40) {
+               u32 vs = hweight8((nv_rd32(dev, 0x001540) & 0x0000ff00) >> 8);
+               u32 rsvd;
+
+               /* estimate grctx size, the magics come from nv40_grctx.c */
+               if      (dev_priv->chipset == 0x40) rsvd = 0x6aa0 * vs;
+               else if (dev_priv->chipset  < 0x43) rsvd = 0x4f00 * vs;
+               else if (nv44_graph_class(dev))     rsvd = 0x4980 * vs;
+               else                                rsvd = 0x4a40 * vs;
+               rsvd += 16 * 1024;
+               rsvd *= dev_priv->engine.fifo.channels;
+
+               /* pciegart table */
+               if (drm_pci_device_is_pcie(dev))
+                       rsvd += 512 * 1024;
+
+               /* object storage */
+               rsvd += 512 * 1024;
+
+               dev_priv->ramin_rsvd_vram = round_up(rsvd, 4096);
+       } else {
+               dev_priv->ramin_rsvd_vram = 512 * 1024;
+       }
 
        ret = dev_priv->engine.vram.init(dev);
        if (ret)
index 1205f0f345b95c3b7f93f2062eb5618fb1d9ce2c..a33fe4019286e39294af123b7f8140973451c623 100644 (file)
@@ -427,8 +427,7 @@ nouveau_sgdma_init(struct drm_device *dev)
        u32 aper_size, align;
        int ret;
 
-       if (dev_priv->card_type >= NV_50 ||
-           dev_priv->ramin_rsvd_vram >= 2 * 1024 * 1024)
+       if (dev_priv->card_type >= NV_50 || drm_pci_device_is_pcie(dev))
                aper_size = 512 * 1024 * 1024;
        else
                aper_size = 64 * 1024 * 1024;