ColdFire: Change the SDRAM BRD2WT timing from 3 to 7
authorTsiChung Liew <Tsi-Chung.Liew@freescale.com>
Fri, 15 Aug 2008 18:24:25 +0000 (18:24 +0000)
committerJohn Rigby <jrigby@freescale.com>
Thu, 28 Aug 2008 15:16:53 +0000 (09:16 -0600)
The user manuals recommend 7.

Signed-off-by: Kurt Mahan <kmahan@freescale.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
include/configs/M5475EVB.h
include/configs/M5485EVB.h

index 4037efb733ef1b9ccbc7a8271705a5096f25ceb6..af6723c63753717faad66bdaf4d1ad7e305abd39 100644 (file)
  */
 #define CFG_SDRAM_BASE         0x00000000
 #define CFG_SDRAM_CFG1         0x73711630
-#define CFG_SDRAM_CFG2         0x46370000
+#define CFG_SDRAM_CFG2         0x46770000
 #define CFG_SDRAM_CTRL         0xE10B0000
 #define CFG_SDRAM_EMOD         0x40010000
 #define CFG_SDRAM_MODE         0x018D0000
index a14c55bc336507c9d75a514e9551e640ce148bde..248db53d9a3fba4ac43ecff3f04c0cbdce21bc0e 100644 (file)
  */
 #define CFG_SDRAM_BASE         0x00000000
 #define CFG_SDRAM_CFG1         0x73711630
-#define CFG_SDRAM_CFG2         0x46370000
+#define CFG_SDRAM_CFG2         0x46770000
 #define CFG_SDRAM_CTRL         0xE10B0000
 #define CFG_SDRAM_EMOD         0x40010000
 #define CFG_SDRAM_MODE         0x018D0000