// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-#include "qcom-ipq8064-v2.0.dtsi"
-#include <dt-bindings/input/input.h>
+#include "qcom-ipq8064-eax500.dtsi"
/ {
model = "Linksys EA7500 V1 WiFi Router";
};
chosen {
- bootargs = "console=ttyMSM0,115200n8";
-
- append-rootblock = "ubi.mtd="; /* append to bootargs adding the root deviceblock nbr from bootloader */
- find-rootblock = "ubi.mtd="; /* look for root deviceblock nbr in this bootarg */
+ /* look for root deviceblock nbr in this bootarg */
+ find-rootblock = "ubi.mtd=";
};
keys {
};
};
-&usb3_0 {
- status = "okay";
-};
-
-&usb3_1 {
- status = "okay";
-};
-
-&pcie0 {
- status = "okay";
- force_gen1 = <1>;
-};
-
-&pcie1 {
- status = "okay";
-};
-
-&pcie2 {
- status = "okay";
-};
-
-&nand_controller {
- status = "okay";
-
- pinctrl-0 = <&nand_pins>;
- pinctrl-names = "default";
-
- nand@0 {
- reg = <0>;
- compatible = "qcom,nandcs";
-
- nand-ecc-strength = <4>;
- nand-bus-width = <8>;
- nand-ecc-step-size = <512>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@0 {
- label = "SBL1";
- reg = <0x0000000 0x0040000>;
- read-only;
- };
-
- partition@40000 {
- label = "MIBIB";
- reg = <0x0040000 0x0140000>;
- read-only;
- };
-
- partition@180000 {
- label = "SBL2";
- reg = <0x0180000 0x0140000>;
- read-only;
- };
-
- partition@2c0000 {
- label = "SBL3";
- reg = <0x02c0000 0x0280000>;
- read-only;
- };
-
- partition@540000 {
- label = "DDRCONFIG";
- reg = <0x0540000 0x0120000>;
- read-only;
- };
-
- partition@660000 {
- label = "SSD";
- reg = <0x0660000 0x0120000>;
- read-only;
- };
-
- partition@780000 {
- label = "TZ";
- reg = <0x0780000 0x0280000>;
- read-only;
- };
-
- partition@a00000 {
- label = "RPM";
- reg = <0x0a00000 0x0280000>;
- read-only;
- };
-
- art: partition@c80000 {
- label = "art";
- reg = <0x0c80000 0x0140000>;
- read-only;
- };
-
- partition@dc0000 {
- label = "APPSBL";
- reg = <0x0dc0000 0x0100000>;
- read-only;
- };
-
- partition@ec0000 {
- label = "u_env";
- reg = <0x0ec0000 0x0040000>;
- };
-
- partition@f00000 {
- label = "s_env";
- reg = <0x0f00000 0x0040000>;
- };
-
- partition@f40000 {
- label = "devinfo";
- reg = <0x0f40000 0x0040000>;
- };
-
- partition@f80000 {
- label = "kernel1";
- reg = <0x0f80000 0x2800000>; /* 3 MB spill to rootfs*/
- };
-
- partition@1280000 {
- label = "rootfs1";
- reg = <0x1280000 0x2500000>;
- };
-
- partition@3780000 {
- label = "kernel2";
- reg = <0x3780000 0x2800000>;
- };
-
- partition@3a80000 {
- label = "rootfs2";
- reg = <0x3a80000 0x2500000>;
- };
-
- partition@5f80000 {
- label = "sysdiag";
- reg = <0x5f80000 0x100000>;
- };
-
- partition@6080000 {
- label = "syscfg";
- reg = <0x6080000 0x1f80000>;
- };
- };
- };
-};
-
-&mdio0 {
- status = "okay";
-
- pinctrl-0 = <&mdio0_pins>;
- pinctrl-names = "default";
-
- phy0: ethernet-phy@0 {
- reg = <0>;
- qca,ar8327-initvals = <
- 0x00004 0x7600000 /* PAD0_MODE */
- 0x00008 0x1000000 /* PAD5_MODE */
- 0x0000c 0x80 /* PAD6_MODE */
- 0x00010 0x2613a0 /* PWS_REG */
- 0x000e4 0x6a545 /* MAC_POWER_SEL */
- 0x000e0 0xc74164de /* SGMII_CTRL */
- 0x0007c 0x4e /* PORT0_STATUS */
- 0x00094 0x4e /* PORT6_STATUS */
- >;
- };
-};
-
-&gmac1 {
- status = "okay";
- phy-mode = "rgmii";
- qcom,id = <1>;
-
- pinctrl-0 = <&rgmii2_pins>;
- pinctrl-names = "default";
-
- fixed-link {
- speed = <1000>;
- full-duplex;
+&partitions {
+ partition@5f80000 {
+ label = "sysdiag";
+ reg = <0x5f80000 0x100000>;
};
-};
-&gmac2 {
- status = "okay";
- phy-mode = "sgmii";
- qcom,id = <2>;
-
- fixed-link {
- speed = <1000>;
- full-duplex;
+ partition@6080000 {
+ label = "syscfg";
+ reg = <0x6080000 0x1f80000>;
};
};
-
-&adm_dma {
- status = "okay";
-};
-#include "qcom-ipq8064-v2.0.dtsi"
-
-#include <dt-bindings/input/input.h>
+#include "qcom-ipq8064-eax500.dtsi"
/ {
model = "Linksys EA8500 WiFi Router";
aliases {
mdio-gpio0 = &mdio0;
- led-boot = &power;
- led-failsafe = &power;
- led-running = &power;
- led-upgrade = &power;
- };
-
- chosen {
- bootargs = "console=ttyMSM0,115200n8";
- append-rootblock = "ubi.mtd="; /* append to bootargs adding the root deviceblock nbr from bootloader */
+ led-boot = &led_power;
+ led-failsafe = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_power;
};
keys {
reset {
label = "reset";
gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_RESTART >;
+ linux,code = <KEY_RESTART>;
};
wps {
gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
};
- power: power {
+ led_power: power {
label = "ea8500:white:power";
gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
default-state = "keep";
status = "okay";
};
-&usb3_0 {
- status = "okay";
-};
-
-&usb3_1 {
- status = "okay";
-};
-
-&pcie0 {
- status = "okay";
- force_gen1 = <1>;
-};
-
-&pcie1 {
- status = "okay";
-};
-
-&pcie2 {
- status = "okay";
-};
-
-&nand_controller {
- status = "okay";
-
- pinctrl-0 = <&nand_pins>;
- pinctrl-names = "default";
-
- nand@0 {
- reg = <0>;
- compatible = "qcom,nandcs";
-
- nand-ecc-strength = <4>;
- nand-bus-width = <8>;
- nand-ecc-step-size = <512>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- SBL1@0 {
- label = "SBL1";
- reg = <0x0000000 0x0040000>;
- read-only;
- };
-
- MIBIB@40000 {
- label = "MIBIB";
- reg = <0x0040000 0x0140000>;
- read-only;
- };
-
- SBL2@180000 {
- label = "SBL2";
- reg = <0x0180000 0x0140000>;
- read-only;
- };
-
- SBL3@2c0000 {
- label = "SBL3";
- reg = <0x02c0000 0x0280000>;
- read-only;
- };
-
- DDRCONFIG@540000 {
- label = "DDRCONFIG";
- reg = <0x0540000 0x0120000>;
- read-only;
- };
-
- SSD@660000 {
- label = "SSD";
- reg = <0x0660000 0x0120000>;
- read-only;
- };
-
- TZ@780000 {
- label = "TZ";
- reg = <0x0780000 0x0280000>;
- read-only;
- };
-
- RPM@a00000 {
- label = "RPM";
- reg = <0x0a00000 0x0280000>;
- read-only;
- };
-
- art: art@c80000 {
- label = "art";
- reg = <0x0c80000 0x0140000>;
- read-only;
- };
-
- APPSBL@dc0000 {
- label = "APPSBL";
- reg = <0x0dc0000 0x0100000>;
- read-only;
- };
-
- u_env@ec0000 {
- label = "u_env";
- reg = <0x0ec0000 0x0040000>;
- };
-
- s_env@f00000 {
- label = "s_env";
- reg = <0x0f00000 0x0040000>;
- };
-
- devinfo@f40000 {
- label = "devinfo";
- reg = <0x0f40000 0x0040000>;
- };
-
- linux@f80000 {
- label = "kernel1";
- reg = <0x0f80000 0x2800000>; /* 3 MB spill to rootfs*/
- };
-
- rootfs@1280000 {
- label = "rootfs1";
- reg = <0x1280000 0x2500000>;
- };
-
- linux2@3780000 {
- label = "kernel2";
- reg = <0x3780000 0x2800000>;
- };
-
- rootfs2@3a80000 {
- label = "rootfs2";
- reg = <0x3a80000 0x2500000>;
- };
-
- syscfg@5f80000 {
- label = "syscfg";
- reg = <0x5f80000 0x2080000>;
- };
- };
+&partitions {
+ partition@5f80000 {
+ label = "syscfg";
+ reg = <0x5f80000 0x2080000>;
};
};
&mdio0 {
- status = "okay";
-
- pinctrl-0 = <&mdio0_pins>;
- pinctrl-names = "default";
-
- phy0: ethernet-phy@0 {
- reg = <0>;
- qca,ar8327-initvals = <
- 0x00004 0x7600000 /* PAD0_MODE */
- 0x00008 0x1000000 /* PAD5_MODE */
- 0x0000c 0x80 /* PAD6_MODE */
- 0x00010 0x2613a0 /* PWS_REG */
- 0x000e4 0x6a545 /* MAC_POWER_SEL */
- 0x000e0 0xc74164de /* SGMII_CTRL */
- 0x0007c 0x4e /* PORT0_STATUS */
- 0x00094 0x4e /* PORT6_STATUS */
- >;
- };
-
phy4: ethernet-phy@4 {
reg = <4>;
};
};
&gmac1 {
- status = "okay";
- phy-mode = "rgmii";
- qcom,id = <1>;
qcom,phy_mdio_addr = <4>;
qcom,poll_required = <1>;
qcom,rgmii_delay = <0>;
qcom,emulation = <0>;
- pinctrl-0 = <&rgmii2_pins>;
- pinctrl-names = "default";
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
};
+
/* LAN */
&gmac2 {
- status = "okay";
- phy-mode = "sgmii";
- qcom,id = <2>;
qcom,phy_mdio_addr = <0>; /* none */
qcom,poll_required = <0>; /* no polling */
qcom,rgmii_delay = <0>;
qcom,emulation = <0>;
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
-};
-
-&adm_dma {
- status = "okay";
};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qcom-ipq8064-v2.0.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ chosen {
+ bootargs = "console=ttyMSM0,115200n8";
+ /* append to bootargs adding the root deviceblock nbr from bootloader */
+ append-rootblock = "ubi.mtd=";
+ };
+};
+
+&usb3_0 {
+ status = "okay";
+};
+
+&usb3_1 {
+ status = "okay";
+};
+
+&pcie0 {
+ status = "okay";
+
+ force_gen1 = <1>;
+};
+
+&pcie1 {
+ status = "okay";
+};
+
+&pcie2 {
+ status = "okay";
+};
+
+&nand_controller {
+ status = "okay";
+
+ pinctrl-0 = <&nand_pins>;
+ pinctrl-names = "default";
+
+ nand@0 {
+ reg = <0>;
+ compatible = "qcom,nandcs";
+
+ nand-ecc-strength = <4>;
+ nand-bus-width = <8>;
+ nand-ecc-step-size = <512>;
+
+ partitions: partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "SBL1";
+ reg = <0x0000000 0x0040000>;
+ read-only;
+ };
+
+ partition@40000 {
+ label = "MIBIB";
+ reg = <0x0040000 0x0140000>;
+ read-only;
+ };
+
+ partition@180000 {
+ label = "SBL2";
+ reg = <0x0180000 0x0140000>;
+ read-only;
+ };
+
+ partition@2c0000 {
+ label = "SBL3";
+ reg = <0x02c0000 0x0280000>;
+ read-only;
+ };
+
+ partition@540000 {
+ label = "DDRCONFIG";
+ reg = <0x0540000 0x0120000>;
+ read-only;
+ };
+
+ partition@660000 {
+ label = "SSD";
+ reg = <0x0660000 0x0120000>;
+ read-only;
+ };
+
+ partition@780000 {
+ label = "TZ";
+ reg = <0x0780000 0x0280000>;
+ read-only;
+ };
+
+ partition@a00000 {
+ label = "RPM";
+ reg = <0x0a00000 0x0280000>;
+ read-only;
+ };
+
+ art: partition@c80000 {
+ label = "art";
+ reg = <0x0c80000 0x0140000>;
+ read-only;
+ };
+
+ partition@dc0000 {
+ label = "APPSBL";
+ reg = <0x0dc0000 0x0100000>;
+ read-only;
+ };
+
+ partition@ec0000 {
+ label = "u_env";
+ reg = <0x0ec0000 0x0040000>;
+ };
+
+ partition@f00000 {
+ label = "s_env";
+ reg = <0x0f00000 0x0040000>;
+ };
+
+ partition@f40000 {
+ label = "devinfo";
+ reg = <0x0f40000 0x0040000>;
+ };
+
+ partition@f80000 {
+ label = "kernel1";
+ reg = <0x0f80000 0x2800000>; /* 3 MB spill to rootfs */
+ };
+
+ partition@1280000 {
+ label = "rootfs1";
+ reg = <0x1280000 0x2500000>;
+ };
+
+ partition@3780000 {
+ label = "kernel2";
+ reg = <0x3780000 0x2800000>;
+ };
+
+ partition@3a80000 {
+ label = "rootfs2";
+ reg = <0x3a80000 0x2500000>;
+ };
+ };
+ };
+};
+
+&mdio0 {
+ status = "okay";
+
+ pinctrl-0 = <&mdio0_pins>;
+ pinctrl-names = "default";
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ qca,ar8327-initvals = <
+ 0x00004 0x7600000 /* PAD0_MODE */
+ 0x00008 0x1000000 /* PAD5_MODE */
+ 0x0000c 0x80 /* PAD6_MODE */
+ 0x00010 0x2613a0 /* PWS_REG */
+ 0x000e4 0x6a545 /* MAC_POWER_SEL */
+ 0x000e0 0xc74164de /* SGMII_CTRL */
+ 0x0007c 0x4e /* PORT0_STATUS */
+ 0x00094 0x4e /* PORT6_STATUS */
+ >;
+ };
+};
+
+&gmac1 {
+ status = "okay";
+
+ phy-mode = "rgmii";
+ qcom,id = <1>;
+
+ pinctrl-0 = <&rgmii2_pins>;
+ pinctrl-names = "default";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
+&gmac2 {
+ status = "okay";
+
+ phy-mode = "sgmii";
+ qcom,id = <2>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
+&adm_dma {
+ status = "okay";
+};
projects / openwrt / staging / lynxis.git / commitdiff