cxgb4: Support firmware rdma write with immediate work request.
authorRaju Rangoju <rajur@chelsio.com>
Tue, 20 Mar 2018 10:11:41 +0000 (15:41 +0530)
committerDavid S. Miller <davem@davemloft.net>
Thu, 22 Mar 2018 15:59:11 +0000 (11:59 -0400)
If FW supports RDMA WRITE_WITH_IMMEDATE functionality, then advertise
that
to the ULDs. This will be used by iw_cxgb4 to allow WRITE_WITH_IMMEDIATE
work requests.

Signed-off-by: Potnuri Bharat Teja <bharat@chelsio.com>
Signed-off-by: Raju Rangoju <rajur@chelsio.com>
Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: Steve Wise <swise@opengridcomputing.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.c
drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h
drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h

index 6ce5c0d39d59e0db1b972b05662215a02c7dc1f0..36110cf68595aa28f4ea7d6fe0422fcf63f23ab9 100644 (file)
@@ -390,6 +390,7 @@ struct adapter_params {
         * used by the Port
         */
        u8 mps_bg_map[MAX_NPORTS];      /* MPS Buffer Group Map */
+       bool write_w_imm_support;       /* FW supports WRITE_WITH_IMMEDIATE */
 };
 
 /* State needed to monitor the forward progress of SGE Ingress DMA activities
index 3ce496494f3c37d67436d23ba5723cf7f5081dfa..b31661ce2c75ffd29eca18ee4e8542acc324e845 100644 (file)
@@ -4519,6 +4519,12 @@ static int adap_init0(struct adapter *adap)
                         "max_ordird_qp %d max_ird_adapter %d\n",
                         adap->params.max_ordird_qp,
                         adap->params.max_ird_adapter);
+
+               /* Enable write_with_immediate if FW supports it */
+               params[0] = FW_PARAM_DEV(RDMA_WRITE_WITH_IMM);
+               ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 1, params,
+                                     val);
+               adap->params.write_w_imm_support = (ret == 0 && val[0] != 0);
                adap->num_ofld_uld += 2;
        }
        if (caps_cmd.iscsicaps) {
index 2d827140a475bc80194ba1001f12f36a16793b2d..d8748e1752be00937cb9dadef8edf6d20a66f20b 100644 (file)
@@ -666,6 +666,7 @@ static void uld_init(struct adapter *adap, struct cxgb4_lld_info *lld)
        lld->ulptx_memwrite_dsgl = adap->params.ulptx_memwrite_dsgl;
        lld->nodeid = dev_to_node(adap->pdev_dev);
        lld->fr_nsmr_tpte_wr_support = adap->params.fr_nsmr_tpte_wr_support;
+       lld->write_w_imm_support = adap->params.write_w_imm_support;
 }
 
 static void uld_attach(struct adapter *adap, unsigned int uld)
index 96a69bdacb4c0812a5f6b2ede1979abe3997b27d..fa01a5ce21fa3ee821862e9e33eaf2a16b85d998 100644 (file)
@@ -354,6 +354,7 @@ struct cxgb4_lld_info {
        void **iscsi_ppm;                    /* iscsi page pod manager */
        int nodeid;                          /* device numa node id */
        bool fr_nsmr_tpte_wr_support;        /* FW supports FR_NSMR_TPTE_WR */
+       bool write_w_imm_support;         /* FW supports WRITE_WITH_IMMEDIATE */
 };
 
 struct cxgb4_uld_info {
index 3b0074c0200f01430a9fb1e71e8202841e7214a0..ef7cb5ceefc4ae9dddc30b451492a9ad5a1fe159 100644 (file)
@@ -1213,6 +1213,7 @@ enum fw_params_param_dev {
        FW_PARAMS_PARAM_DEV_FILTER2_WR  = 0x1D,
        FW_PARAMS_PARAM_DEV_MPSBGMAP    = 0x1E,
        FW_PARAMS_PARAM_DEV_HMA_SIZE    = 0x20,
+       FW_PARAMS_PARAM_DEV_RDMA_WRITE_WITH_IMM = 0x21,
 };
 
 /*