drm/amdkfd: page_table_base already have the flags needed

The flags are added when calling amdgpu_gmc_pd_addr().

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
index 54c369091f6c957944c3d5fbe144ccf1e7abd5a3..60b5f56ce7a5f9d9dc25d9c8ace29b3616f49bed 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
@@ -978,7 +978,6 @@ static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
                uint64_t page_table_base)
 {
        struct amdgpu_device *adev = get_amdgpu_device(kgd);
-       uint64_t base = page_table_base | AMDGPU_PTE_VALID;
 
        if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) {
                pr_err("trying to set page table base for wrong VMID %u\n",
@@ -990,7 +989,7 @@ static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
         * now, all processes share the same address space size, like
         * on GFX8 and older.
         */
-       mmhub_v1_0_setup_vm_pt_regs(adev, vmid, base);
+       mmhub_v1_0_setup_vm_pt_regs(adev, vmid, page_table_base);
 
-       gfxhub_v1_0_setup_vm_pt_regs(adev, vmid, base);
+       gfxhub_v1_0_setup_vm_pt_regs(adev, vmid, page_table_base);
 }

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
index 53ff86d45d918d7e465309b9e476641332b241ef..dec8e64f36bdc80ef2ac851ba35d700bf8d32140 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
@@ -507,6 +507,7 @@ struct qcm_process_device {
         * All the memory management data should be here too
         */
        uint64_t gds_context_area;
+       /* Contains page table flags such as AMDGPU_PTE_VALID since gfx9 */
        uint64_t page_table_base;
        uint32_t sh_mem_config;
        uint32_t sh_mem_bases;