Fix documentation

User guide:
1. Remove obsolete note saying only FVP is supported with AArch32
2. Switch compiler for Juno AArch32 to arm-eabi
3. Mention SOFTWARE folder in Juno Linaro release

Index.rst:
1. Switch default FVP model to Version 11.6 Build 45

Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com>
Change-Id: Ib47a2ea314e2b8394a20189bf91796de0e17de53

diff --git a/docs/getting_started/user-guide.rst b/docs/getting_started/user-guide.rst
index e540fd06aec0d9ed00eb3faf46540c4b0f6b5e04..a4886c671e0e5957b165684369c14674fc4feff8 100644 (file)
--- a/docs/getting_started/user-guide.rst
+++ b/docs/getting_started/user-guide.rst
@@ -188,8 +188,6 @@ Building TF-A
       `Summary of build options`_ for more information on available build
       options.
 
-   -  (AArch32 only) Currently only ``PLAT=fvp`` is supported.
-
    -  (AArch32 only) ``AARCH32_SP`` is the AArch32 EL3 Runtime Software and it
       corresponds to the BL32 image. A minimal ``AARCH32_SP``, sp_min, is
       provided by TF-A to demonstrate how PSCI Library can be integrated with
@@ -1359,7 +1357,7 @@ a single FIP binary. It assumes that a `Linaro Release`_ has been installed.
        make [DEBUG=1] [V=1] fiptool
 
        # Unpack firmware images from Linaro FIP
-       ./tools/fiptool/fiptool unpack <path-to-linaro-release>/fip.bin
+       ./tools/fiptool/fiptool unpack <path-to-linaro-release>/[SOFTWARE]/fip.bin
 
    The unpack operation will result in a set of binary images extracted to the
    current working directory. The SCP_BL2 image corresponds to
@@ -1406,7 +1404,7 @@ a single FIP binary. It assumes that a `Linaro Release`_ has been installed.
 
       .. code:: shell
 
-          export CROSS_COMPILE=<path-to-aarch32-gcc>/bin/arm-linux-gnueabihf-
+          export CROSS_COMPILE=<path-to-aarch32-gcc>/bin/arm-eabi-
 
    -  Build BL32 in AArch32.
 

diff --git a/docs/index.rst b/docs/index.rst
index 2023ceb1d9cf976cd6292bfe94397c90fbe0eacf..bf2b873be5421b9d1cd3674774cbb18e7b7381bc 100644 (file)
--- a/docs/index.rst
+++ b/docs/index.rst
@@ -154,7 +154,7 @@ Arm FVPs without shifted affinities, and that do not support threaded CPU cores
 (64-bit host machine only).
 
 .. note::
-   The FVP models used are Version 11.5 Build 33, unless otherwise stated.
+   The FVP models used are Version 11.6 Build 45, unless otherwise stated.
 
 -  ``FVP_Base_AEMv8A-AEMv8A``
 -  ``FVP_Base_AEMv8A-AEMv8A-AEMv8A-AEMv8A-CCN502``