mlxsw: reg: Add priority field for PTCEV2 register
authorJiri Pirko <jiri@mellanox.com>
Sun, 8 Jul 2018 20:51:24 +0000 (23:51 +0300)
committerDavid S. Miller <davem@davemloft.net>
Mon, 9 Jul 2018 23:24:17 +0000 (16:24 -0700)
This is going to be needed for Spectrum-2 C-TCAM implementation.

Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/reg.h
drivers/net/ethernet/mellanox/mlxsw/spectrum1_acl_tcam.c
drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_ctcam.c

index 29c51ae912411ad6c74ad89520149814b573392e..ccf4aae91630b30ec41094976498416c05a092b5 100644 (file)
@@ -2402,6 +2402,15 @@ MLXSW_ITEM32(reg, ptce2, op, 0x00, 20, 3);
  */
 MLXSW_ITEM32(reg, ptce2, offset, 0x00, 0, 16);
 
+/* reg_ptce2_priority
+ * Priority of the rule, higher values win. The range is 1..cap_kvd_size-1.
+ * Note: priority does not have to be unique per rule.
+ * Within a region, higher priority should have lower offset (no limitation
+ * between regions in a multi-region).
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, ptce2, priority, 0x04, 0, 24);
+
 /* reg_ptce2_tcam_region_info
  * Opaque object that represents the TCAM region.
  * Access: Index
@@ -2437,12 +2446,13 @@ MLXSW_ITEM_BUF(reg, ptce2, flex_action_set, 0xE0,
 static inline void mlxsw_reg_ptce2_pack(char *payload, bool valid,
                                        enum mlxsw_reg_ptce2_op op,
                                        const char *tcam_region_info,
-                                       u16 offset)
+                                       u16 offset, u32 priority)
 {
        MLXSW_REG_ZERO(ptce2, payload);
        mlxsw_reg_ptce2_v_set(payload, valid);
        mlxsw_reg_ptce2_op_set(payload, op);
        mlxsw_reg_ptce2_offset_set(payload, offset);
+       mlxsw_reg_ptce2_priority_set(payload, priority);
        mlxsw_reg_ptce2_tcam_region_info_memcpy_to(payload, tcam_region_info);
 }
 
index 6aecfd62c3b0c9eff557408e165a18caa1748ea6..752c2ecd7a02f98d24ec2fa84c019458d698a1f4 100644 (file)
@@ -203,7 +203,7 @@ mlxsw_sp1_acl_tcam_region_entry_activity_get(struct mlxsw_sp *mlxsw_sp,
        int err;
 
        mlxsw_reg_ptce2_pack(ptce2_pl, true, MLXSW_REG_PTCE2_OP_QUERY_CLEAR_ON_READ,
-                            _region->tcam_region_info, offset);
+                            _region->tcam_region_info, offset, 0);
        err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptce2), ptce2_pl);
        if (err)
                return err;
index 013ab8592fb95275cd19561de027dc2def9eea46..34546abb3fe589b6d902a39d905bfef632f4b8cc 100644 (file)
@@ -80,7 +80,7 @@ mlxsw_sp_acl_ctcam_region_entry_insert(struct mlxsw_sp *mlxsw_sp,
        char *key;
 
        mlxsw_reg_ptce2_pack(ptce2_pl, true, MLXSW_REG_PTCE2_OP_WRITE_WRITE,
-                            region->tcam_region_info, offset);
+                            region->tcam_region_info, offset, 0);
        key = mlxsw_reg_ptce2_flex_key_blocks_data(ptce2_pl);
        mask = mlxsw_reg_ptce2_mask_data(ptce2_pl);
        mlxsw_afk_encode(afk, region->key_info, &rulei->values, key, mask);
@@ -100,7 +100,7 @@ mlxsw_sp_acl_ctcam_region_entry_remove(struct mlxsw_sp *mlxsw_sp,
        char ptce2_pl[MLXSW_REG_PTCE2_LEN];
 
        mlxsw_reg_ptce2_pack(ptce2_pl, false, MLXSW_REG_PTCE2_OP_WRITE_WRITE,
-                            region->tcam_region_info, offset);
+                            region->tcam_region_info, offset, 0);
        mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce2), ptce2_pl);
 }