When updating the write pointer, the TX queue should be locked
to get consistent state, fix that in the interrupt handler.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
if (inta & CSR_INT_BIT_WAKEUP) {
IWL_DEBUG_ISR(trans, "Wakeup interrupt\n");
iwl_pcie_rxq_check_wrptr(trans);
- for (i = 0; i < trans->cfg->base_params->num_of_queues; i++)
+ for (i = 0; i < trans->cfg->base_params->num_of_queues; i++) {
+ spin_lock(&trans_pcie->txq[i].lock);
iwl_pcie_txq_inc_wr_ptr(trans, &trans_pcie->txq[i]);
+ spin_unlock(&trans_pcie->txq[i].lock);
+ }
isr_stats->wakeup++;