irqchip: Prepare for local stub header removal
authorJoel Porquet <joel@porquet.org>
Tue, 7 Jul 2015 21:11:46 +0000 (17:11 -0400)
committerThomas Gleixner <tglx@linutronix.de>
Sat, 11 Jul 2015 21:14:23 +0000 (23:14 +0200)
The IRQCHIP_DECLARE macro moved to to 'include/linux/irqchip.h', so
the local irqchip.h became an empty shell, which solely includes
include/linux/irqchip.h

Include the global header in all irqchip drivers instead of the local
header, so we can remove it.

Signed-off-by: Joel Porquet <joel@porquet.org>
Cc: vgupta@synopsys.com
Cc: monstr@monstr.eu
Cc: ralf@linux-mips.org
Cc: jason@lakedaemon.net
Link: http://lkml.kernel.org/r/1882096.X39jVG8e0D@joel-zenbook
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
44 files changed:
drivers/irqchip/exynos-combiner.c
drivers/irqchip/irq-armada-370-xp.c
drivers/irqchip/irq-atmel-aic.c
drivers/irqchip/irq-atmel-aic5.c
drivers/irqchip/irq-bcm2835.c
drivers/irqchip/irq-bcm7038-l1.c
drivers/irqchip/irq-bcm7120-l2.c
drivers/irqchip/irq-brcmstb-l2.c
drivers/irqchip/irq-clps711x.c
drivers/irqchip/irq-crossbar.c
drivers/irqchip/irq-digicolor.c
drivers/irqchip/irq-dw-apb-ictl.c
drivers/irqchip/irq-gic-v3-its.c
drivers/irqchip/irq-gic-v3.c
drivers/irqchip/irq-gic.c
drivers/irqchip/irq-hip04.c
drivers/irqchip/irq-ingenic.c
drivers/irqchip/irq-keystone.c
drivers/irqchip/irq-mips-cpu.c
drivers/irqchip/irq-mips-gic.c
drivers/irqchip/irq-mmp.c
drivers/irqchip/irq-moxart.c
drivers/irqchip/irq-mtk-sysirq.c
drivers/irqchip/irq-mxs.c
drivers/irqchip/irq-nvic.c
drivers/irqchip/irq-omap-intc.c
drivers/irqchip/irq-or1k-pic.c
drivers/irqchip/irq-orion.c
drivers/irqchip/irq-renesas-h8300h.c
drivers/irqchip/irq-renesas-h8s.c
drivers/irqchip/irq-s3c24xx.c
drivers/irqchip/irq-sirfsoc.c
drivers/irqchip/irq-sun4i.c
drivers/irqchip/irq-sunxi-nmi.c
drivers/irqchip/irq-tb10x.c
drivers/irqchip/irq-tegra.c
drivers/irqchip/irq-versatile-fpga.c
drivers/irqchip/irq-vf610-mscm-ir.c
drivers/irqchip/irq-vic.c
drivers/irqchip/irq-vt8500.c
drivers/irqchip/irq-xtensa-mx.c
drivers/irqchip/irq-xtensa-pic.c
drivers/irqchip/irq-zevio.c
drivers/irqchip/spear-shirq.c

index 5c82e3bdafdf0f61f054b7ea14144346a4390002..05cdccc3d5e07b7f1e047cd91f511a7b6f8d93e7 100644 (file)
 #include <linux/slab.h>
 #include <linux/syscore_ops.h>
 #include <linux/irqdomain.h>
+#include <linux/irqchip.h>
 #include <linux/irqchip/chained_irq.h>
 #include <linux/interrupt.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 
-#include "irqchip.h"
-
 #define COMBINER_ENABLE_SET    0x0
 #define COMBINER_ENABLE_CLEAR  0x4
 #define COMBINER_INT_STATUS    0xC
index 0d3b0fe2f175e89912db13bc38e6d7235d60d835..73b73ac04ce7e696eae55d65713488eb14c0a992 100644 (file)
@@ -18,6 +18,7 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
+#include <linux/irqchip.h>
 #include <linux/irqchip/chained_irq.h>
 #include <linux/cpu.h>
 #include <linux/io.h>
@@ -33,8 +34,6 @@
 #include <asm/smp_plat.h>
 #include <asm/mach/irq.h>
 
-#include "irqchip.h"
-
 /* Interrupt Controller Registers Map */
 #define ARMADA_370_XP_INT_SET_MASK_OFFS                (0x48)
 #define ARMADA_370_XP_INT_CLEAR_MASK_OFFS      (0x4C)
index dae3604b32a900ab71c0d098eb4790a4ff4e4af7..dbbf30aee27801734fe860921d14c693058addd4 100644 (file)
@@ -19,6 +19,7 @@
 #include <linux/bitmap.h>
 #include <linux/types.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
@@ -31,7 +32,6 @@
 #include <asm/mach/irq.h>
 
 #include "irq-atmel-aic-common.h"
-#include "irqchip.h"
 
 /* Number of irq lines managed by AIC */
 #define NR_AIC_IRQS    32
index 459bf4429d365794d4f84c19116cb0d57755c646..ff2e832af10dd8778b86b41c4f15fd4ec36faac1 100644 (file)
@@ -19,6 +19,7 @@
 #include <linux/bitmap.h>
 #include <linux/types.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
@@ -31,7 +32,6 @@
 #include <asm/mach/irq.h>
 
 #include "irq-atmel-aic-common.h"
-#include "irqchip.h"
 
 /* Number of irq lines managed by AIC */
 #define NR_AIC5_IRQS   128
index e68c3b60a681ba460b24dd17499de544ea4a35fc..a36ba96e14481169db72a9cfc58d39d1df942e0c 100644 (file)
 #include <linux/slab.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 
 #include <asm/exception.h>
 #include <asm/mach/irq.h>
 
-#include "irqchip.h"
-
 /* Put the bank and irq (32 bits) into the hwirq */
 #define MAKE_HWIRQ(b, n)       ((b << 5) | (n))
 #define HWIRQ_BANK(i)          (i >> 5)
index d3b8c8be15f67460023b7483b69ced1050aa2a08..66850aa203ce337d3e25156074299a1a93bfd473 100644 (file)
 #include <linux/slab.h>
 #include <linux/smp.h>
 #include <linux/types.h>
+#include <linux/irqchip.h>
 #include <linux/irqchip/chained_irq.h>
 
-#include "irqchip.h"
-
 #define IRQS_PER_WORD          32
 #define REG_BYTES_PER_IRQ_WORD (sizeof(u32) * 4)
 #define MAX_WORDS              8
index 3ba5cc780fcbbba4568db2557df8828b63d5d4d9..7de378e98cf209bc61decefc5fcf762824a31d35 100644 (file)
 #include <linux/irqdomain.h>
 #include <linux/reboot.h>
 #include <linux/bitops.h>
+#include <linux/irqchip.h>
 #include <linux/irqchip/chained_irq.h>
 
-#include "irqchip.h"
-
 /* Register offset in the L2 interrupt controller */
 #define IRQEN          0x00
 #define IRQSTAT                0x04
index d6bcc6be077777551bf5a970938d3703fdc477d0..4e60b88ec33fb1c7a1dcf24a138b8f9681d2c63d 100644 (file)
@@ -32,8 +32,6 @@
 #include <linux/irqchip.h>
 #include <linux/irqchip/chained_irq.h>
 
-#include "irqchip.h"
-
 /* Register offsets in the L2 interrupt controller */
 #define CPU_STATUS     0x00
 #define CPU_SET                0x04
index 33127f131d7840b0c0ec4c8ca15b0aa46b9ab5ba..2dd929eed9e0516fca48845f83720578622609be 100644 (file)
@@ -11,6 +11,7 @@
 
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
@@ -19,8 +20,6 @@
 #include <asm/exception.h>
 #include <asm/mach/irq.h>
 
-#include "irqchip.h"
-
 #define CLPS711X_INTSR1        (0x0240)
 #define CLPS711X_INTMR1        (0x0280)
 #define CLPS711X_BLEOI (0x0600)
index 692fe2bc81979b6b48f984ec6d88c117fbfdebdd..1240c4deda7517d63c789e53d49951ed82336452 100644 (file)
  */
 #include <linux/err.h>
 #include <linux/io.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/slab.h>
 
-#include "irqchip.h"
-
 #define IRQ_FREE       -1
 #define IRQ_RESERVED   -2
 #define IRQ_SKIP       -3
index 3cbc658afe27a4f7d28875373a1816afad86ac8b..dad85e74c37c051c02ea1b859db6aa5e66047731 100644 (file)
@@ -12,6 +12,7 @@
 
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
@@ -20,8 +21,6 @@
 
 #include <asm/exception.h>
 
-#include "irqchip.h"
-
 #define UC_IRQ_CONTROL         0x04
 
 #define IC_FLAG_CLEAR_LO       0x00
index ca22f4e739443c0f7da108a0535e01e815aa3789..efd95d9955e7e3b5a0be532f36fa64c8a7c4da47 100644 (file)
 
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqchip/chained_irq.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 
-#include "irqchip.h"
-
 #define APB_INT_ENABLE_L       0x00
 #define APB_INT_ENABLE_H       0x04
 #define APB_INT_MASK_L         0x08
index 1b7e155869f6c1a5f9ff361f246b6fd71539dadc..63dbdec2f05b0a9d2733106f953ed44a0d8001ae 100644 (file)
 #include <linux/percpu.h>
 #include <linux/slab.h>
 
+#include <linux/irqchip.h>
 #include <linux/irqchip/arm-gic-v3.h>
 
 #include <asm/cacheflush.h>
 #include <asm/cputype.h>
 #include <asm/exception.h>
 
-#include "irqchip.h"
-
 #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING          (1 << 0)
 
 #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING    (1 << 0)
index c52f7ba205b4c872205323868ecf0349f8174b20..e406bc5f13e4f10083ff2d91aa9d81785a8cc2fe 100644 (file)
@@ -25,6 +25,7 @@
 #include <linux/percpu.h>
 #include <linux/slab.h>
 
+#include <linux/irqchip.h>
 #include <linux/irqchip/arm-gic-v3.h>
 
 #include <asm/cputype.h>
@@ -32,7 +33,6 @@
 #include <asm/smp_plat.h>
 
 #include "irq-gic-common.h"
-#include "irqchip.h"
 
 struct redist_region {
        void __iomem            *redist_base;
index 8d7e1c8b6d566cb385c5cc92ff67c24f40692c9a..9be84bd3cd5543d2aa2f9a2321129f0131bfc0e4 100644 (file)
@@ -38,6 +38,7 @@
 #include <linux/interrupt.h>
 #include <linux/percpu.h>
 #include <linux/slab.h>
+#include <linux/irqchip.h>
 #include <linux/irqchip/chained_irq.h>
 #include <linux/irqchip/arm-gic.h>
 #include <linux/irqchip/arm-gic-acpi.h>
@@ -48,7 +49,6 @@
 #include <asm/smp_plat.h>
 
 #include "irq-gic-common.h"
-#include "irqchip.h"
 
 union gic_base {
        void __iomem *common_base;
index 0cae45d106950783108b60c31432a9149e75f638..55c2c1074e15ce45ff9573fd36fc4f11cf6be896 100644 (file)
@@ -41,6 +41,7 @@
 #include <linux/irqdomain.h>
 #include <linux/interrupt.h>
 #include <linux/slab.h>
+#include <linux/irqchip.h>
 #include <linux/irqchip/arm-gic.h>
 
 #include <asm/irq.h>
@@ -48,7 +49,6 @@
 #include <asm/smp_plat.h>
 
 #include "irq-gic-common.h"
-#include "irqchip.h"
 
 #define HIP04_MAX_IRQS         510
 
index 005de3f932ae8807a2a7af66a40c2c421e425996..fc5953dea509af10b38abf783dac4fbd83efdaaa 100644 (file)
@@ -18,6 +18,7 @@
 #include <linux/types.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
+#include <linux/irqchip.h>
 #include <linux/irqchip/ingenic.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
@@ -28,8 +29,6 @@
 #include <asm/io.h>
 #include <asm/mach-jz4740/irq.h>
 
-#include "irqchip.h"
-
 struct ingenic_intc_data {
        void __iomem *base;
        unsigned num_chips;
index 81e3cf5b9a1faa07ddbb1ab52b714aa08e0a4e09..d10244fa743ab06e31fafcb2880131a538fc615e 100644 (file)
 #include <linux/module.h>
 #include <linux/moduleparam.h>
 #include <linux/irqdomain.h>
+#include <linux/irqchip.h>
 #include <linux/irqchip/chained_irq.h>
 #include <linux/of.h>
 #include <linux/of_platform.h>
 #include <linux/mfd/syscon.h>
 #include <linux/regmap.h>
-#include "irqchip.h"
-
 
 /* The source ID bits start from 4 to 31 (total 28 bits)*/
 #define BIT_OFS                        4
index a43c41988009c644400a164b7e893e2621d54568..8c504f562e9dcdb5c5fd2a9b88ab591dd763782c 100644 (file)
@@ -31,6 +31,7 @@
 #include <linux/interrupt.h>
 #include <linux/kernel.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 
 #include <asm/irq_cpu.h>
@@ -38,8 +39,6 @@
 #include <asm/mipsmtregs.h>
 #include <asm/setup.h>
 
-#include "irqchip.h"
-
 static inline void unmask_mips_irq(struct irq_data *d)
 {
        set_c0_status(0x100 << (d->irq - MIPS_CPU_IRQ_BASE));
index 4400edd1a6c729129357f5df0bdb37f7e8f018db..42dbebc55e32b2bbb6891ba651d3c37967a8b12d 100644 (file)
@@ -11,6 +11,7 @@
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqchip/mips-gic.h>
 #include <linux/of_address.h>
 #include <linux/sched.h>
@@ -22,8 +23,6 @@
 
 #include <dt-bindings/interrupt-controller/mips-gic.h>
 
-#include "irqchip.h"
-
 unsigned int gic_present;
 
 struct gic_pcpu_mask {
index c0da57bdb89dfcf0c0e2224180715989a88086a6..c9c03a2646321e608e77da2dd8484d7c605bfb50 100644 (file)
@@ -15,6 +15,7 @@
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 #include <linux/io.h>
 #include <linux/ioport.h>
@@ -24,8 +25,6 @@
 #include <asm/exception.h>
 #include <asm/hardirq.h>
 
-#include "irqchip.h"
-
 #define MAX_ICU_NR             16
 
 #define PJ1_INT_SEL            0x10c
index 00b3cc908f762d58fd92720d73fd2e3f1cb28e3f..a24b06a1718b6fd7e6bd90f4269d47d14722a225 100644 (file)
@@ -12,6 +12,7 @@
 
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
@@ -19,8 +20,6 @@
 
 #include <asm/exception.h>
 
-#include "irqchip.h"
-
 #define IRQ_SOURCE_REG         0
 #define IRQ_MASK_REG           0x04
 #define IRQ_CLEAR_REG          0x08
index 15c13039bba211b53a309d05ba4fd0f333364065..c8753da4c156ee9e2fa1b3b5ddfde63561733d30 100644 (file)
@@ -13,6 +13,7 @@
  */
 
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 #include <linux/of.h>
 #include <linux/of_irq.h>
@@ -21,8 +22,6 @@
 #include <linux/slab.h>
 #include <linux/spinlock.h>
 
-#include "irqchip.h"
-
 struct mtk_sysirq_chip_data {
        spinlock_t lock;
        void __iomem *intpol_base;
index 04bf97b289cf4a10a6c4d4344247e6d26e4a22f5..1faf812f3dc8e4a8da4e8d9a2b4f214216705041 100644 (file)
@@ -19,6 +19,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 #include <linux/io.h>
 #include <linux/of.h>
@@ -27,8 +28,6 @@
 #include <linux/stmp_device.h>
 #include <asm/exception.h>
 
-#include "irqchip.h"
-
 #define HW_ICOLL_VECTOR                                0x0000
 #define HW_ICOLL_LEVELACK                      0x0010
 #define HW_ICOLL_CTRL                          0x0020
index 5fac9100f6cbee9f7abf144eb4dcb9efeb3aaee0..a878b8d03868823a222af0ee4d0f296793673a7d 100644 (file)
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 
 #include <asm/v7m.h>
 #include <asm/exception.h>
 
-#include "irqchip.h"
-
 #define NVIC_ISER              0x000
 #define NVIC_ICER              0x080
 #define NVIC_IPR               0x300
index a569c6dbd1d16ee92bffabb6e45f9a6a2cbed4be..6cc0ad57ffabcb93a9601a84d3628f88513b5433 100644 (file)
 #include <linux/io.h>
 
 #include <asm/exception.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 
-#include "irqchip.h"
-
 /* Define these here for now until we drop all board-files */
 #define OMAP24XX_IC_BASE       0x480fe000
 #define OMAP34XX_IC_BASE       0x48200000
index e93d079fe069eb11a55f6ff422063ec19620a826..6a9a3e79218b0fc623f99ad8f347362a92319300 100644 (file)
@@ -9,12 +9,11 @@
  */
 
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/of.h>
 #include <linux/of_irq.h>
 #include <linux/of_address.h>
 
-#include "irqchip.h"
-
 /* OR1K PIC implementation */
 
 struct or1k_pic_dev {
index ad0c0f6f1d65ac6b4cf7d8db80f635cf698a9875..995f66b8616e21172349292384212679371b7beb 100644 (file)
 
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <asm/exception.h>
 #include <asm/mach/irq.h>
 
-#include "irqchip.h"
-
 /*
  * Orion SoC main interrupt controller
  */
index 1870e6bd3dd9ef3c21170bfc9ae0aa0fec541b12..6fd30d5ee14dddcd7a35169632a26d2156c2e34c 100644 (file)
@@ -11,8 +11,6 @@
 #include <linux/of_irq.h>
 #include <asm/io.h>
 
-#include "irqchip.h"
-
 static const char ipr_bit[] = {
         7,  6,  5,  5,
         4,  4,  4,  4,  3,  3,  3,  3,
index 64425f4de7d9542468708bd5bb7b5a2aef97dcfa..8098ead1eb22aa8600c8a6b25bf3c3eb8f0c486d 100644 (file)
@@ -5,10 +5,10 @@
  */
 
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <asm/io.h>
-#include "irqchip.h"
 
 static void *intc_baseaddr;
 #define IPRA ((unsigned long)intc_baseaddr)
index e96717f45ea15148adb46aefe5f74428a46b97a9..aee4266f27f758f252bc874159b584eb05c73842 100644 (file)
@@ -25,6 +25,7 @@
 #include <linux/ioport.h>
 #include <linux/device.h>
 #include <linux/irqdomain.h>
+#include <linux/irqchip.h>
 #include <linux/irqchip/chained_irq.h>
 #include <linux/of.h>
 #include <linux/of_irq.h>
@@ -40,8 +41,6 @@
 #include <plat/regs-irqtype.h>
 #include <plat/pm.h>
 
-#include "irqchip.h"
-
 #define S3C_IRQTYPE_NONE       0
 #define S3C_IRQTYPE_EINT       1
 #define S3C_IRQTYPE_EDGE       2
index b93006955b85b27398dfc78861c09f48d0e20115..10cb21b9ba3d6779c1f0a593f3a715ef6857cc89 100644 (file)
 #include <linux/irq.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 #include <linux/syscore_ops.h>
 #include <asm/mach/irq.h>
 #include <asm/exception.h>
-#include "irqchip.h"
 
 #define SIRFSOC_INT_RISC_MASK0         0x0018
 #define SIRFSOC_INT_RISC_MASK1         0x001C
index 83d6aa6464ee0b688c3b777c5eda519f0091af4e..4ad3e7c69aa779e2f53b039fb1138807ce9f1ae2 100644 (file)
@@ -16,6 +16,7 @@
 
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
@@ -23,8 +24,6 @@
 #include <asm/exception.h>
 #include <asm/mach/irq.h>
 
-#include "irqchip.h"
-
 #define SUN4I_IRQ_VECTOR_REG           0x00
 #define SUN4I_IRQ_PROTECTION_REG       0x08
 #define SUN4I_IRQ_NMI_CTRL_REG         0x0c
index 6b2b582433bde95062e85d17403e4a505c5a4ef9..2fb8c0e6f02b1261647c85a6bd27dfe6da24b733 100644 (file)
@@ -17,8 +17,8 @@
 #include <linux/of_irq.h>
 #include <linux/of_address.h>
 #include <linux/of_platform.h>
+#include <linux/irqchip.h>
 #include <linux/irqchip/chained_irq.h>
-#include "irqchip.h"
 
 #define SUNXI_NMI_SRC_TYPE_MASK        0x00000003
 
index accc20036a3c6580eb7320554f4603306c72b1ac..55dea554d9553591dd913f13854dc8a9f722baf5 100644 (file)
 #include <linux/interrupt.h>
 #include <linux/irqdomain.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/of_irq.h>
 #include <linux/of_address.h>
 #include <linux/of_platform.h>
 #include <linux/io.h>
 #include <linux/slab.h>
 #include <linux/bitops.h>
-#include "irqchip.h"
 
 #define AB_IRQCTL_INT_ENABLE   0x00
 #define AB_IRQCTL_INT_STATUS   0x04
index f67bbd80433e8c90527a9b911a2656987b800b96..2fd89eb88f3a29bc716ec1daf76ad4085e6a743d 100644 (file)
@@ -24,6 +24,7 @@
 
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 #include <linux/of_address.h>
 #include <linux/slab.h>
@@ -31,8 +32,6 @@
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
-#include "irqchip.h"
-
 #define ICTLR_CPU_IEP_VFIQ     0x08
 #define ICTLR_CPU_IEP_FIR      0x14
 #define ICTLR_CPU_IEP_FIR_SET  0x18
index 888111b76ea0dd525c44ab46f68f96206be8e05d..4ba480b928448c70fce29ec7ad6bd553899f13ae 100644 (file)
@@ -4,6 +4,7 @@
 #include <linux/bitops.h>
 #include <linux/irq.h>
 #include <linux/io.h>
+#include <linux/irqchip.h>
 #include <linux/irqchip/versatile-fpga.h>
 #include <linux/irqdomain.h>
 #include <linux/module.h>
@@ -14,8 +15,6 @@
 #include <asm/exception.h>
 #include <asm/mach/irq.h>
 
-#include "irqchip.h"
-
 #define IRQ_STATUS             0x00
 #define IRQ_RAW_STATUS         0x04
 #define IRQ_ENABLE_SET         0x08
index f5c01cbcc73ac1376627cf31aa227a9cf5c25179..2c22558864012efe6425ab1f058ea0e07a9f0728 100644 (file)
@@ -26,6 +26,7 @@
 #include <linux/cpu_pm.h>
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 #include <linux/mfd/syscon.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -34,8 +35,6 @@
 #include <linux/slab.h>
 #include <linux/regmap.h>
 
-#include "irqchip.h"
-
 #define MSCM_CPxNUM            0x4
 
 #define MSCM_IRSPRC(n)         (0x80 + 2 * (n))
index d4ce331ea4a08eadbd447e61486eff0d124d842c..4cd65c19c1eeb9c2872fc9e429545b5f93faeeee 100644 (file)
@@ -24,6 +24,7 @@
 #include <linux/list.h>
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqchip/chained_irq.h>
 #include <linux/irqdomain.h>
 #include <linux/of.h>
@@ -37,8 +38,6 @@
 #include <asm/exception.h>
 #include <asm/irq.h>
 
-#include "irqchip.h"
-
 #define VIC_IRQ_STATUS                 0x00
 #define VIC_FIQ_STATUS                 0x04
 #define VIC_INT_SELECT                 0x0c    /* 1 = FIQ, 0 = IRQ */
index 0b297009b85662888fbe29af6dd18b5bd45b5151..52c280004c56854945308a99807290e008decfab 100644 (file)
@@ -27,6 +27,7 @@
 #include <linux/slab.h>
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 #include <linux/interrupt.h>
 #include <linux/bitops.h>
@@ -39,8 +40,6 @@
 #include <asm/exception.h>
 #include <asm/mach/irq.h>
 
-#include "irqchip.h"
-
 #define VT8500_ICPC_IRQ                0x20
 #define VT8500_ICPC_FIQ                0x24
 #define VT8500_ICDC            0x40            /* Destination Control 64*u32 */
index e1c2f963289374b38a3a7bce93c930cb6565b376..bb3ac5fe5846b9e2d27b71bea9bf0bff9bcb8e2d 100644 (file)
 #include <linux/interrupt.h>
 #include <linux/irqdomain.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/of.h>
 
 #include <asm/mxregs.h>
 
-#include "irqchip.h"
-
 #define HW_IRQ_IPI_COUNT 2
 #define HW_IRQ_MX_BASE 2
 #define HW_IRQ_EXTERN_BASE 3
index 7d71126d1ce5596668176ea7b03b541292ded9d1..472ae17709647201606a10344fd741d77e81e988 100644 (file)
 #include <linux/interrupt.h>
 #include <linux/irqdomain.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/of.h>
 
-#include "irqchip.h"
-
 unsigned int cached_irq_mask;
 
 /*
index e4ef74ed454a8d6826947924523498191efb474a..4c48fa88a03d9b54651276cfe95a8fc2d5e287af 100644 (file)
@@ -11,6 +11,7 @@
 
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
@@ -18,8 +19,6 @@
 #include <asm/mach/irq.h>
 #include <asm/exception.h>
 
-#include "irqchip.h"
-
 #define IO_STATUS      0x000
 #define IO_RAW_STATUS  0x004
 #define IO_ENABLE      0x008
index a45121546caff05acff16beb8d1dd2f4aa0d35c2..3df144f0f79b0dc62714b59ae17013f1a33fd35e 100644 (file)
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/spinlock.h>
 
-#include "irqchip.h"
-
 /*
  * struct spear_shirq: shared irq structure
  *