Bringing PCIe hosted bus up requires operating on host-related core.
Since we plan to support PCIe Gen 2 devices we should provide a helper
picking the correct one (PCIE or PCIE2).
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
/* driver_pci.c */
u32 bcma_pcie_read(struct bcma_drv_pci *pc, u32 address);
+void bcma_core_pci_up(struct bcma_drv_pci *pc);
+void bcma_core_pci_down(struct bcma_drv_pci *pc);
extern int bcma_chipco_watchdog_register(struct bcma_drv_cc *cc);
bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
}
-void bcma_core_pci_up(struct bcma_bus *bus)
+void bcma_core_pci_up(struct bcma_drv_pci *pc)
{
- struct bcma_drv_pci *pc;
-
- if (bus->hosttype != BCMA_HOSTTYPE_PCI)
- return;
-
- pc = &bus->drv_pci[0];
-
bcma_core_pci_extend_L1timer(pc, true);
}
-EXPORT_SYMBOL_GPL(bcma_core_pci_up);
-void bcma_core_pci_down(struct bcma_bus *bus)
+void bcma_core_pci_down(struct bcma_drv_pci *pc)
{
- struct bcma_drv_pci *pc;
-
- if (bus->hosttype != BCMA_HOSTTYPE_PCI)
- return;
-
- pc = &bus->drv_pci[0];
-
bcma_core_pci_extend_L1timer(pc, false);
}
-EXPORT_SYMBOL_GPL(bcma_core_pci_down);
{
pci_unregister_driver(&bcma_pci_bridge_driver);
}
+
+/**************************************************
+ * Runtime ops for drivers.
+ **************************************************/
+
+/* See also pcicore_up */
+void bcma_host_pci_up(struct bcma_bus *bus)
+{
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
+ return;
+
+ if (bus->host_is_pcie2)
+ pr_warn("Bringing up bus with PCIe Gen 2 host is unsupported yet\n");
+ else
+ bcma_core_pci_up(&bus->drv_pci[0]);
+}
+EXPORT_SYMBOL_GPL(bcma_host_pci_up);
+
+/* See also pcicore_down */
+void bcma_host_pci_down(struct bcma_bus *bus)
+{
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
+ return;
+
+ if (!bus->host_is_pcie2)
+ bcma_core_pci_down(&bus->drv_pci[0]);
+}
+EXPORT_SYMBOL_GPL(bcma_host_pci_down);
switch (dev->dev->bus_type) {
#ifdef CONFIG_B43_BCMA
case B43_BUS_BCMA:
- bcma_core_pci_down(dev->dev->bdev->bus);
+ bcma_host_pci_down(dev->dev->bdev->bus);
break;
#endif
#ifdef CONFIG_B43_SSB
case B43_BUS_BCMA:
bcma_core_pci_irq_ctl(&dev->dev->bdev->bus->drv_pci[0],
dev->dev->bdev, true);
- bcma_core_pci_up(dev->dev->bdev->bus);
+ bcma_host_pci_up(dev->dev->bdev->bus);
break;
#endif
#ifdef CONFIG_B43_SSB
brcms_c_coredisable(wlc_hw);
/* Match driver "down" state */
- bcma_core_pci_down(wlc_hw->d11core->bus);
+ bcma_host_pci_down(wlc_hw->d11core->bus);
/* turn off pll and xtal to match driver "down" state */
brcms_b_xtal(wlc_hw, OFF);
*/
if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
/* put SB PCI in down state again */
- bcma_core_pci_down(wlc_hw->d11core->bus);
+ bcma_host_pci_down(wlc_hw->d11core->bus);
brcms_b_xtal(wlc_hw, OFF);
return -ENOMEDIUM;
}
- bcma_core_pci_up(wlc_hw->d11core->bus);
+ bcma_host_pci_up(wlc_hw->d11core->bus);
/* reset the d11 core */
brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
/* turn off primary xtal and pll */
if (!wlc_hw->noreset) {
- bcma_core_pci_down(wlc_hw->d11core->bus);
+ bcma_host_pci_down(wlc_hw->d11core->bus);
brcms_b_xtal(wlc_hw, OFF);
}
}
return bcma_find_core_unit(bus, coreid, 0);
}
+extern void bcma_host_pci_up(struct bcma_bus *bus);
+extern void bcma_host_pci_down(struct bcma_bus *bus);
+
extern bool bcma_core_is_enabled(struct bcma_device *core);
extern void bcma_core_disable(struct bcma_device *core, u32 flags);
extern int bcma_core_enable(struct bcma_device *core, u32 flags);
extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
struct bcma_device *core, bool enable);
-extern void bcma_core_pci_up(struct bcma_bus *bus);
-extern void bcma_core_pci_down(struct bcma_bus *bus);
extern void bcma_core_pci_power_save(struct bcma_bus *bus, bool up);
extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);