[ARM] S3C64XX: GPIO definitions for BANKS G,H,I,J

GPIO register and configuration definitions for GPIO
banks G, H, I and J.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>

diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h
new file mode 100644 (file)
index 0000000..35bbd23
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h
@@ -0,0 +1,42 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *     Ben Dooks <ben@simtec.co.uk>
+ *     http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank G register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPGCON                 (S3C64XX_GPG_BASE + 0x00)
+#define S3C64XX_GPGDAT                 (S3C64XX_GPG_BASE + 0x04)
+#define S3C64XX_GPGPUD                 (S3C64XX_GPG_BASE + 0x08)
+#define S3C64XX_GPGCONSLP              (S3C64XX_GPG_BASE + 0x0c)
+#define S3C64XX_GPGPUDSLP              (S3C64XX_GPG_BASE + 0x10)
+
+#define S3C64XX_GPG_CONMASK(__gpio)    (0xf << ((__gpio) * 4))
+#define S3C64XX_GPG_INPUT(__gpio)      (0x0 << ((__gpio) * 4))
+#define S3C64XX_GPG_OUTPUT(__gpio)     (0x1 << ((__gpio) * 4))
+
+#define S3C64XX_GPG0_MMC0_CLK          (0x02 << 0)
+#define S3C64XX_GPG0_EINT_G5_0         (0x07 << 0)
+
+#define S3C64XX_GPG1_MMC0_CMD          (0x02 << 4)
+#define S3C64XX_GPG1_EINT_G5_1         (0x07 << 4)
+
+#define S3C64XX_GPG2_MMC0_DATA0                (0x02 << 8)
+#define S3C64XX_GPG2_EINT_G5_2         (0x07 << 8)
+
+#define S3C64XX_GPG3_MMC0_DATA1                (0x02 << 12)
+#define S3C64XX_GPG3_EINT_G5_3         (0x07 << 12)
+
+#define S3C64XX_GPG4_MMC0_DATA2                (0x02 << 16)
+#define S3C64XX_GPG4_EINT_G5_4         (0x07 << 16)
+
+#define S3C64XX_GPG5_MMC0_DATA3                (0x02 << 20)
+#define S3C64XX_GPG5_EINT_G5_5         (0x07 << 20)
+

diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
new file mode 100644 (file)
index 0000000..8154951
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
@@ -0,0 +1,74 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *     Ben Dooks <ben@simtec.co.uk>
+ *     http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank H register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPHCON0                        (S3C64XX_GPH_BASE + 0x00)
+#define S3C64XX_GPHCON1                        (S3C64XX_GPH_BASE + 0x04)
+#define S3C64XX_GPHDAT                 (S3C64XX_GPH_BASE + 0x08)
+#define S3C64XX_GPHPUD                 (S3C64XX_GPH_BASE + 0x0c)
+#define S3C64XX_GPHCONSLP              (S3C64XX_GPH_BASE + 0x10)
+#define S3C64XX_GPHPUDSLP              (S3C64XX_GPH_BASE + 0x14)
+
+#define S3C64XX_GPH_CONMASK(__gpio)    (0xf << ((__gpio) * 4))
+#define S3C64XX_GPH_INPUT(__gpio)      (0x0 << ((__gpio) * 4))
+#define S3C64XX_GPH_OUTPUT(__gpio)     (0x1 << ((__gpio) * 4))
+
+#define S3C64XX_GPH0_MMC1_CLK          (0x02 << 0)
+#define S3C64XX_GPH0_KP_COL0           (0x04 << 0)
+#define S3C64XX_GPH0_EINT_G6_0         (0x07 << 0)
+
+#define S3C64XX_GPH1_MMC1_CMD          (0x02 << 4)
+#define S3C64XX_GPH1_KP_COL1           (0x04 << 4)
+#define S3C64XX_GPH1_EINT_G6_1         (0x07 << 4)
+
+#define S3C64XX_GPH2_MMC1_DATA0                (0x02 << 8)
+#define S3C64XX_GPH2_KP_COL2           (0x04 << 8)
+#define S3C64XX_GPH2_EINT_G6_2         (0x07 << 8)
+
+#define S3C64XX_GPH3_MMC1_DATA1                (0x02 << 12)
+#define S3C64XX_GPH3_KP_COL3           (0x04 << 12)
+#define S3C64XX_GPH3_EINT_G6_3         (0x07 << 12)
+
+#define S3C64XX_GPH4_MMC1_DATA2                (0x02 << 16)
+#define S3C64XX_GPH4_KP_COL4           (0x04 << 16)
+#define S3C64XX_GPH4_EINT_G6_4         (0x07 << 16)
+
+#define S3C64XX_GPH5_MMC1_DATA3                (0x02 << 20)
+#define S3C64XX_GPH5_KP_COL5           (0x04 << 20)
+#define S3C64XX_GPH5_EINT_G6_5         (0x07 << 20)
+
+#define S3C64XX_GPH6_MMC1_DATA4                (0x02 << 24)
+#define S3C64XX_GPH6_MMC2_DATA0                (0x03 << 24)
+#define S3C64XX_GPH6_KP_COL6           (0x04 << 24)
+#define S3C64XX_GPH6_I2S_V40_BCLK      (0x05 << 24)
+#define S3C64XX_GPH6_ADDR_CF0          (0x06 << 24)
+#define S3C64XX_GPH6_EINT_G6_6         (0x07 << 24)
+
+#define S3C64XX_GPH7_MMC1_DATA5                (0x02 << 28)
+#define S3C64XX_GPH7_MMC2_DATA1                (0x03 << 28)
+#define S3C64XX_GPH7_KP_COL7           (0x04 << 28)
+#define S3C64XX_GPH7_I2S_V40_CDCLK     (0x05 << 28)
+#define S3C64XX_GPH7_ADDR_CF1          (0x06 << 28)
+#define S3C64XX_GPH7_EINT_G6_7         (0x07 << 28)
+
+#define S3C64XX_GPH8_MMC1_DATA6                (0x02 << 32)
+#define S3C64XX_GPH8_MMC2_DATA2                (0x03 << 32)
+#define S3C64XX_GPH8_I2S_V40_LRCLK     (0x05 << 32)
+#define S3C64XX_GPH8_ADDR_CF2          (0x06 << 32)
+#define S3C64XX_GPH8_EINT_G6_8         (0x07 << 32)
+
+#define S3C64XX_GPH9_MMC1_DATA7                (0x02 << 36)
+#define S3C64XX_GPH9_MMC2_DATA3                (0x03 << 36)
+#define S3C64XX_GPH9_I2S_V40_DI                (0x05 << 36)
+#define S3C64XX_GPH9_EINT_G6_9         (0x07 << 36)
+

diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h
new file mode 100644 (file)
index 0000000..ce9ebe3
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h
@@ -0,0 +1,40 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *     Ben Dooks <ben@simtec.co.uk>
+ *     http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank I register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPICON                 (S3C64XX_GPI_BASE + 0x00)
+#define S3C64XX_GPIDAT                 (S3C64XX_GPI_BASE + 0x04)
+#define S3C64XX_GPIPUD                 (S3C64XX_GPI_BASE + 0x08)
+#define S3C64XX_GPICONSLP              (S3C64XX_GPI_BASE + 0x0c)
+#define S3C64XX_GPIPUDSLP              (S3C64XX_GPI_BASE + 0x10)
+
+#define S3C64XX_GPI_CONMASK(__gpio)    (0x3 << ((__gpio) * 2))
+#define S3C64XX_GPI_INPUT(__gpio)      (0x0 << ((__gpio) * 2))
+#define S3C64XX_GPI_OUTPUT(__gpio)     (0x1 << ((__gpio) * 2))
+
+#define S3C64XX_GPI0_VD0               (0x02 << 0)
+#define S3C64XX_GPI1_VD1               (0x02 << 2)
+#define S3C64XX_GPI2_VD2               (0x02 << 4)
+#define S3C64XX_GPI3_VD3               (0x02 << 6)
+#define S3C64XX_GPI4_VD4               (0x02 << 8)
+#define S3C64XX_GPI5_VD5               (0x02 << 10)
+#define S3C64XX_GPI6_VD6               (0x02 << 12)
+#define S3C64XX_GPI7_VD7               (0x02 << 14)
+#define S3C64XX_GPI8_VD8               (0x02 << 16)
+#define S3C64XX_GPI9_VD9               (0x02 << 18)
+#define S3C64XX_GPI10_VD10             (0x02 << 20)
+#define S3C64XX_GPI11_VD11             (0x02 << 22)
+#define S3C64XX_GPI12_VD12             (0x02 << 24)
+#define S3C64XX_GPI13_VD13             (0x02 << 26)
+#define S3C64XX_GPI14_VD14             (0x02 << 28)
+#define S3C64XX_GPI15_VD15             (0x02 << 30)

diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h
new file mode 100644 (file)
index 0000000..21a9062
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h
@@ -0,0 +1,36 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *     Ben Dooks <ben@simtec.co.uk>
+ *     http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank J register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPJCON                 (S3C64XX_GPJ_BASE + 0x00)
+#define S3C64XX_GPJDAT                 (S3C64XX_GPJ_BASE + 0x04)
+#define S3C64XX_GPJPUD                 (S3C64XX_GPJ_BASE + 0x08)
+#define S3C64XX_GPJCONSLP              (S3C64XX_GPJ_BASE + 0x0c)
+#define S3C64XX_GPJPUDSLP              (S3C64XX_GPJ_BASE + 0x10)
+
+#define S3C64XX_GPJ_CONMASK(__gpio)    (0x3 << ((__gpio) * 2))
+#define S3C64XX_GPJ_INPUT(__gpio)      (0x0 << ((__gpio) * 2))
+#define S3C64XX_GPJ_OUTPUT(__gpio)     (0x1 << ((__gpio) * 2))
+
+#define S3C64XX_GPJ0_VD16              (0x02 << 0)
+#define S3C64XX_GPJ1_VD17              (0x02 << 2)
+#define S3C64XX_GPJ2_VD18              (0x02 << 4)
+#define S3C64XX_GPJ3_VD19              (0x02 << 6)
+#define S3C64XX_GPJ4_VD20              (0x02 << 8)
+#define S3C64XX_GPJ5_VD21              (0x02 << 10)
+#define S3C64XX_GPJ6_VD22              (0x02 << 12)
+#define S3C64XX_GPJ7_VD23              (0x02 << 14)
+#define S3C64XX_GPJ8_LCD_HSYNC         (0x02 << 16)
+#define S3C64XX_GPJ9_LCD_VSYNC         (0x02 << 18)
+#define S3C64XX_GPJ10_LCD_VDEN         (0x02 << 20)
+#define S3C64XX_GPJ11_LCD_VCLK         (0x02 << 22)