#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
-#ifdef CONFIG_SYS_MX31_UART1
void mx31_uart1_hw_init(void)
{
/* setup pins for UART1 */
mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
}
-#endif
-#ifdef CONFIG_SYS_MX31_UART2
void mx31_uart2_hw_init(void)
{
/* setup pins for UART2 */
mx31_gpio_mux(MUX_RTS2__UART2_RTS_B);
mx31_gpio_mux(MUX_CTS2__UART2_CTS_B);
}
-#endif
#ifdef CONFIG_MXC_SPI
/*
#define IMX_I2C3_BASE (0x43F84000)
#define IMX_CAN1_BASE (0x43F88000)
#define IMX_CAN2_BASE (0x43F8C000)
-#define IMX_UART1_BASE (0x43F90000)
-#define IMX_UART2_BASE (0x43F94000)
+#define UART1_BASE (0x43F90000)
+#define UART2_BASE (0x43F94000)
#define IMX_I2C2_BASE (0x43F98000)
#define IMX_OWIRE_BASE (0x43F9C000)
#define IMX_CSPI1_BASE (0x43FA4000)
/* SPBA */
#define IMX_SPBA_BASE (0x50000000)
#define IMX_CSPI3_BASE (0x50004000)
-#define IMX_UART4_BASE (0x50008000)
-#define IMX_UART3_BASE (0x5000C000)
+#define UART4_BASE (0x50008000)
+#define UART3_BASE (0x5000C000)
#define IMX_CSPI2_BASE (0x50010000)
#define IMX_SSI2_BASE (0x50014000)
#define IMX_ESAI_BASE (0x50018000)
#define IMX_ATA_DMA_BASE (0x50020000)
#define IMX_SIM1_BASE (0x50024000)
#define IMX_SIM2_BASE (0x50028000)
-#define IMX_UART5_BASE (0x5002C000)
+#define UART5_BASE (0x5002C000)
#define IMX_TSC_BASE (0x50030000)
#define IMX_SSI1_BASE (0x50034000)
#define IMX_FEC_BASE (0x50038000)
#define IMX_TIM1_BASE (0x03000 + IMX_IO_BASE)
#define IMX_TIM2_BASE (0x04000 + IMX_IO_BASE)
#define IMX_TIM3_BASE (0x05000 + IMX_IO_BASE)
-#define IMX_UART1_BASE (0x0a000 + IMX_IO_BASE)
-#define IMX_UART2_BASE (0x0b000 + IMX_IO_BASE)
-#define IMX_UART3_BASE (0x0c000 + IMX_IO_BASE)
-#define IMX_UART4_BASE (0x0d000 + IMX_IO_BASE)
+#define UART1_BASE (0x0a000 + IMX_IO_BASE)
+#define UART2_BASE (0x0b000 + IMX_IO_BASE)
+#define UART3_BASE (0x0c000 + IMX_IO_BASE)
+#define UART4_BASE (0x0d000 + IMX_IO_BASE)
#define IMX_I2C1_BASE (0x12000 + IMX_IO_BASE)
#define IMX_GPIO_BASE (0x15000 + IMX_IO_BASE)
#define IMX_TIM4_BASE (0x19000 + IMX_IO_BASE)
#define WEIM_ESDCFG1 0xB800100C
#define WEIM_ESDMISC 0xB8001010
+#define UART1_BASE 0x43F90000
+#define UART2_BASE 0x43F94000
+#define UART3_BASE 0x5000C000
+#define UART4_BASE 0x43FB0000
+#define UART5_BASE 0x43FB4000
+
#define ESDCTL_SDE (1 << 31)
#define ESDCTL_CMD_RW (0 << 28)
#define ESDCTL_CMD_PRECHARGE (1 << 28)
#define I2C_BASE_ADDR 0x43F80000
#define I2C3_BASE_ADDR 0x43F84000
#define ATA_BASE_ADDR 0x43F8C000
-#define UART1_BASE_ADDR 0x43F90000
-#define UART2_BASE_ADDR 0x43F94000
+#define UART1_BASE 0x43F90000
+#define UART2_BASE 0x43F94000
#define I2C2_BASE_ADDR 0x43F98000
#define CSPI1_BASE_ADDR 0x43FA4000
#define IOMUXC_BASE_ADDR 0x43FAC000
* SPBA
*/
#define SPBA_BASE_ADDR 0x50000000
-#define UART3_BASE_ADDR 0x5000C000
+#define UART3_BASE 0x5000C000
#define CSPI2_BASE_ADDR 0x50010000
#define ATA_DMA_BASE_ADDR 0x50020000
#define FEC_BASE_ADDR 0x50038000
*/
#define MMC_SDHC1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00004000)
#define MMC_SDHC2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00008000)
-#define UART3_BASE_ADDR (SPBA0_BASE_ADDR + 0x0000C000)
+#define UART3_BASE (SPBA0_BASE_ADDR + 0x0000C000)
#define CSPI1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00010000)
#define SSI2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00014000)
#define MMC_SDHC3_BASE_ADDR (SPBA0_BASE_ADDR + 0x00020000)
#define EPIT2_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B0000)
#define PWM1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B4000)
#define PWM2_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B8000)
-#define UART1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000BC000)
-#define UART2_BASE_ADDR (AIPS1_BASE_ADDR + 0x000C0000)
+#define UART1_BASE (AIPS1_BASE_ADDR + 0x000BC000)
+#define UART2_BASE (AIPS1_BASE_ADDR + 0x000C0000)
#define SRC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000D0000)
#define CCM_BASE_ADDR (AIPS1_BASE_ADDR + 0x000D4000)
#define GPC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000D8000)
#define __REG(x) (*((volatile u32 *)(x)))
-#if defined(CONFIG_SYS_MX31_UART1) || defined(CONFIG_SYS_MX25_UART1)
-#define UART_PHYS 0x43f90000
-#elif defined(CONFIG_SYS_MX31_UART2) || defined(CONFIG_SYS_MX25_UART2)
-#define UART_PHYS 0x43f94000
-#elif defined(CONFIG_SYS_MX31_UART3) || defined(CONFIG_SYS_MX25_UART3)
-#define UART_PHYS 0x5000c000
-#elif defined(CONFIG_SYS_MX31_UART4) || defined(CONFIG_SYS_MX25_UART4)
-#define UART_PHYS 0x43fb0000
-#elif defined(CONFIG_SYS_MX31_UART5) || defined(CONFIG_SYS_MX25_UART5)
-#define UART_PHYS 0x43fb4000
-#elif defined(CONFIG_SYS_MX27_UART1)
-#define UART_PHYS 0x1000a000
-#elif defined(CONFIG_SYS_MX27_UART2)
-#define UART_PHYS 0x1000b000
-#elif defined(CONFIG_SYS_MX27_UART3)
-#define UART_PHYS 0x1000c000
-#elif defined(CONFIG_SYS_MX27_UART4)
-#define UART_PHYS 0x1000d000
-#elif defined(CONFIG_SYS_MX27_UART5)
-#define UART_PHYS 0x1001b000
-#elif defined(CONFIG_SYS_MX27_UART6)
-#define UART_PHYS 0x1001c000
-#elif defined(CONFIG_SYS_MX35_UART1) || defined(CONFIG_SYS_MX51_UART1) || \
- defined(CONFIG_SYS_MX53_UART1)
-#define UART_PHYS UART1_BASE_ADDR
-#elif defined(CONFIG_SYS_MX35_UART2) || defined(CONFIG_SYS_MX51_UART2) || \
- defined(CONFIG_SYS_MX53_UART2)
-#define UART_PHYS UART2_BASE_ADDR
-#elif defined(CONFIG_SYS_MX35_UART3) || defined(CONFIG_SYS_MX51_UART3) || \
- defined(CONFIG_SYS_MX53_UART3)
-#define UART_PHYS UART3_BASE_ADDR
-#else
-#error "define CONFIG_SYS_MXxx_UARTx to use the MXC UART driver"
+#ifndef CONFIG_MXC_UART_BASE
+#error "define CONFIG_MXC_UART_BASE to use the MXC UART driver"
#endif
+#define UART_PHYS CONFIG_MXC_UART_BASE
+
#ifdef CONFIG_SERIAL_MULTI
#warning "MXC driver does not support MULTI serials."
#endif
* Hardware drivers
*/
#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX51_UART1
+#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
* UART (console)
*/
#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX35_UART3
+#define CONFIG_MXC_UART_BASE UART3_BASE
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
* Serial Driver info
*/
#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX27_UART1
+#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
* Hardware drivers
*/
-#define CONFIG_MXC_UART 1
-#define CONFIG_SYS_MX31_UART1 1
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_MXC_GPIO
#define CONFIG_HARD_SPI 1
#define CONFIG_SYS_I2C_SLAVE 0xfe
#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX31_UART1
+#define CONFIG_MXC_UART_BASE UART1_BASE
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
/* Serial Info */
#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX25_UART1
+#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
* Hardware drivers
*/
-#define CONFIG_MXC_UART 1
-#define CONFIG_SYS_MX31_UART1 1
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_HARD_SPI 1
#define CONFIG_MXC_SPI 1
*/
#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX31_UART1
+#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_HW_WATCHDOG
#define CONFIG_MXC_GPIO
* UART (console)
*/
#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX35_UART1
+#define CONFIG_MXC_UART_BASE UART1_BASE
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
* Hardware drivers
*/
#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX51_UART1
+#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_MXC_GPIO
/*
#define CONFIG_MXC_GPIO
#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX53_UART1
+#define CONFIG_MXC_UART_BASE UART1_BASE
/* I2C Configs */
#define CONFIG_CMD_I2C
#define CONFIG_MXC_GPIO
#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX53_UART1
+#define CONFIG_MXC_UART_BASE UART1_BASE
/* I2C Configs */
#define CONFIG_CMD_I2C
#define CONFIG_MXC_GPIO
#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX53_UART1
+#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_MXC_GPIO
#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX53_UART1
+#define CONFIG_MXC_UART_BASE UART1_BASE
/* I2C Configs */
#define CONFIG_CMD_I2C
* Hardware drivers
*/
-#define CONFIG_MXC_UART 1
-#define CONFIG_SYS_MX31_UART1 1
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_MXC_GPIO
#define CONFIG_HW_WATCHDOG
* make sure that the transceiver is enabled during PL=1 for testing!
*/
#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX31_UART2
+#define CONFIG_MXC_UART_BASE UART2_BASE
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO
* Serial Info
*/
#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX25_UART1
+#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
* Hardware drivers
*/
#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX51_UART3
+#define CONFIG_MXC_UART_BASE UART3_BASE
#define CONFIG_MXC_GPIO
#define CONFIG_MXC_SPI
#define CONFIG_HW_WATCHDOG
* Serial
*/
#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX25_UART2
+#define CONFIG_MXC_UART_BASE UART2_BASE
#define CONFIG_CONS_INDEX 1 /* use UART2 for console */
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }