spi: armada-3700: Add documentation for the Armada 3700 SPI Controller
authorRomain Perier <romain.perier@free-electrons.com>
Thu, 8 Dec 2016 14:58:45 +0000 (15:58 +0100)
committerMark Brown <broonie@kernel.org>
Thu, 8 Dec 2016 16:05:34 +0000 (16:05 +0000)
This adds the devicetree bindings documentation for the SPI controller
present in the Marvell Armada 3700 SoCs.

Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Documentation/devicetree/bindings/spi/spi-armada-3700.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/spi/spi-armada-3700.txt b/Documentation/devicetree/bindings/spi/spi-armada-3700.txt
new file mode 100644 (file)
index 0000000..1564aa8
--- /dev/null
@@ -0,0 +1,25 @@
+* Marvell Armada 3700 SPI Controller
+
+Required Properties:
+
+- compatible: should be "marvell,armada-3700-spi"
+- reg: physical base address of the controller and length of memory mapped
+       region.
+- interrupts: The interrupt number. The interrupt specifier format depends on
+             the interrupt controller and of its driver.
+- clocks: Must contain the clock source, usually from the North Bridge clocks.
+- num-cs: The number of chip selects that is supported by this SPI Controller
+- #address-cells: should be 1.
+- #size-cells: should be 0.
+
+Example:
+
+       spi0: spi@10600 {
+               compatible = "marvell,armada-3700-spi";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x10600 0x5d>;
+               clocks = <&nb_perih_clk 7>;
+               interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+               num-cs = <4>;
+       };