lantiq: fix an ethernet stability issue triggered by receving packets during boot

Disabling ethernet during reboot (only to enable it again when the
ethernet driver attaches) can put the chip into a faulty state where it
corrupts the header of all incoming packets.

This happens if packets arrive during the time window where the core is
disabled, and it can be easily reproduced by rebooting while sending a
flood ping to the broadcast address.

Signed-off-by: Felix Fietkau <nbd@nbd.name>

diff --git a/target/linux/lantiq/patches-4.4/0070-MIPS-Lantiq-Keep-ethernet-enabled-during-boot.patch b/target/linux/lantiq/patches-4.4/0070-MIPS-Lantiq-Keep-ethernet-enabled-during-boot.patch
new file mode 100644 (file)
index 0000000..67cf7d3
--- /dev/null
+++ b/target/linux/lantiq/patches-4.4/0070-MIPS-Lantiq-Keep-ethernet-enabled-during-boot.patch
@@ -0,0 +1,53 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Thu, 19 Jan 2017 14:14:36 +0100
+Subject: [PATCH] MIPS: Lantiq: Keep ethernet enabled during boot
+
+Disabling ethernet during reboot (only to enable it again when the
+ethernet driver attaches) can put the chip into a faulty state where it
+corrupts the header of all incoming packets.
+
+This happens if packets arrive during the time window where the core is
+disabled, and it can be easily reproduced by rebooting while sending a
+flood ping to the broadcast address.
+
+Cc: john@phrozen.org
+Cc: hauke.mehrtens@lantiq.com
+Cc: stable@vger.kernel.org
+Fixes: 95135bfa7ead ("MIPS: Lantiq: Deactivate most of the devices by default")
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/arch/mips/lantiq/xway/sysctrl.c
++++ b/arch/mips/lantiq/xway/sysctrl.c
+@@ -564,7 +564,7 @@ void __init ltq_soc_init(void)
+               clkdev_add_pmu("1a800000.pcie", "msi", 1, 1, PMU1_PCIE2_MSI);
+               clkdev_add_pmu("1a800000.pcie", "pdi", 1, 1, PMU1_PCIE2_PDI);
+               clkdev_add_pmu("1a800000.pcie", "ctl", 1, 1, PMU1_PCIE2_CTL);
+-              clkdev_add_pmu("1e108000.eth", NULL, 1, 0, PMU_SWITCH | PMU_PPE_DP);
++              clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP);
+               clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
+               clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
+       } else if (of_machine_is_compatible("lantiq,ar10")) {
+@@ -572,7 +572,7 @@ void __init ltq_soc_init(void)
+                                 ltq_ar10_fpi_hz(), ltq_ar10_pp32_hz());
+               clkdev_add_pmu("1e101000.usb", "ctl", 1, 0, PMU_USB0);
+               clkdev_add_pmu("1e106000.usb", "ctl", 1, 0, PMU_USB1);
+-              clkdev_add_pmu("1e108000.eth", NULL, 1, 0, PMU_SWITCH |
++              clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH |
+                              PMU_PPE_DP | PMU_PPE_TC);
+               clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
+               clkdev_add_pmu("1f203000.rcu", "gphy", 1, 0, PMU_GPHY);
+@@ -594,11 +594,11 @@ void __init ltq_soc_init(void)
+               clkdev_add_pmu(NULL, "ahb", 1, 0, PMU_AHBM | PMU_AHBS);
+ 
+               clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
+-              clkdev_add_pmu("1e108000.eth", NULL, 1, 0,
++              clkdev_add_pmu("1e108000.eth", NULL, 0, 0,
+                               PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM |
+                               PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 |
+                               PMU_PPE_QSB | PMU_PPE_TOP);
+-              clkdev_add_pmu("1f203000.rcu", "gphy", 1, 0, PMU_GPHY);
++              clkdev_add_pmu("1f203000.rcu", "gphy", 0, 0, PMU_GPHY);
+               clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
+               clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
+               clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);