powerpc: simplify BDI switch

There is no reason to re-read each time the pointer at
location 0xf0 as it is fixed and known.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index 25607604a7a5b0cbca4eea5573ee202997afdb3b..6d22a8e78fe2244479ae6498293d0c667b6c084a 100644 (file)
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -356,6 +356,8 @@ extern void early_init_mmu_secondary(void);
 extern void setup_initial_memory_limit(phys_addr_t first_memblock_base,
                                       phys_addr_t first_memblock_size);
 static inline void mmu_early_init_devtree(void) { }
+
+extern void *abatron_pteptrs[2];
 #endif /* __ASSEMBLY__ */
 #endif
 

diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 05b08db3901dc9cb58c55310a7dd6d230127f3cf..c2f564690778d6df618b9e44aa2cf25e73ca48e4 100644 (file)
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -1027,9 +1027,8 @@ _ENTRY(switch_mmu_context)
         * The PGDIR is passed as second argument.
         */
        lwz     r4,MM_PGD(r4)
-       lis     r5, KERNELBASE@h
-       lwz     r5, 0xf0(r5)
-       stw     r4, 0x4(r5)
+       lis     r5, abatron_pteptrs@ha
+       stw     r4, abatron_pteptrs@l + 0x4(r5)
 #endif
        li      r4,0
        isync

diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S
index b19d784105118dff99297edd3b90d8e3f3120ef2..11dd09d0ce1aa336d26121b1a91dec628d6cdfa8 100644 (file)
--- a/arch/powerpc/kernel/head_40x.S
+++ b/arch/powerpc/kernel/head_40x.S
@@ -953,9 +953,8 @@ _GLOBAL(set_context)
        /* Context switch the PTE pointer for the Abatron BDI2000.
         * The PGDIR is the second parameter.
         */
-       lis     r5, KERNELBASE@h
-       lwz     r5, 0xf0(r5)
-       stw     r4, 0x4(r5)
+       lis     r5, abatron_pteptrs@ha
+       stw     r4, abatron_pteptrs@l + 0x4(r5)
 #endif
        sync
        mtspr   SPRN_PID,r3

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 67cbae30ebf2d7646a7791c98a3b985912aa9737..7e14796bea81ceacfdce033e3a636d0c5b8fa93d 100644 (file)
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -989,5 +989,6 @@ swapper_pg_dir:
 /* Room for two PTE table poiners, usually the kernel and current user
  * pointer to their respective root page table (pgdir).
  */
+       .globl  abatron_pteptrs
 abatron_pteptrs:
        .space  8

diff --git a/arch/powerpc/mm/8xx_mmu.c b/arch/powerpc/mm/8xx_mmu.c
index bfa503cff35114b72bcee40c32365c17af935696..f12ec85e965c8c4f271a5e69ee195754ba1fc9ee 100644 (file)
--- a/arch/powerpc/mm/8xx_mmu.c
+++ b/arch/powerpc/mm/8xx_mmu.c
@@ -162,14 +162,11 @@ void set_context(unsigned long id, pgd_t *pgd)
 {
        s16 offset = (s16)(__pa(swapper_pg_dir));
 
-#ifdef CONFIG_BDI_SWITCH
-       pgd_t   **ptr = *(pgd_t ***)(KERNELBASE + 0xf0);
-
        /* Context switch the PTE pointer for the Abatron BDI2000.
         * The PGDIR is passed as second argument.
         */
-       *(ptr + 1) = pgd;
-#endif
+       if (IS_ENABLED(CONFIG_BDI_SWITCH))
+               abatron_pteptrs[1] = pgd;
 
        /* Register M_TWB will contain base address of level 1 table minus the
         * lower part of the kernel PGDIR base address, so that all accesses to