rtl93xx: fix condition intended to only select internal serdes ports
authorPeter Körner <git@mazdermind.de>
Sun, 24 Sep 2023 18:58:13 +0000 (20:58 +0200)
committerChristian Marangi <ansuelsmth@gmail.com>
Tue, 3 Oct 2023 17:02:09 +0000 (19:02 +0200)
This condition was introduced in commit 51c8f7661244 ("realtek: Improve
MAC config handling for all SoCs") to correctly report the speed of the
internal serdes ports as 10G, but instead makes all ports read 10G
because the or-operator should have been an and-operator.

Fixes: #9953
Fixes: 51c8f7661244 ("realtek: Improve MAC config handling for all SoCs")
Signed-off-by: Peter Körner <git@mazdermind.de>
[ wrap comment to 72 column and improve commit ref ]
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
(cherry picked from commit 9fb5082e258ac4672dc69636e5eb79f426defac8)

target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c

index 5744c70ea3f0fd09370dfbfe44f4dc062a061381..6f55f1e892ed81d57f0258229c3e146e9e4c8e0a 100644 (file)
@@ -559,7 +559,7 @@ static int rtl93xx_phylink_mac_link_state(struct dsa_switch *ds, int port,
        }
 
        if (priv->family_id == RTL9310_FAMILY_ID
-               && (port >= 52 || port <= 55)) { /* Internal serdes */
+               && (port >= 52 && port <= 55)) { /* Internal serdes */
                        state->speed = SPEED_10000;
                        state->link = 1;
                        state->duplex = 1;