drm/amd/pp: Rename enable_per_cu_power_gating to powergate_gfx

keep consistent with powergate_uvd/vce/mmhub

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index da98208cd1307808c89109e139ed9df0c59cd737..b69da116b30c76109647f2d387a95d9f90142351 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -236,13 +236,13 @@ static int pp_set_powergating_state(void *handle,
                        pr_err("gfx off control failed!\n");
        }
 
-       if (hwmgr->hwmgr_func->enable_per_cu_power_gating == NULL) {
-               pr_debug("%s was not implemented.\n", __func__);
+       if (hwmgr->hwmgr_func->powergate_gfx == NULL) {
+               pr_info("%s was not implemented.\n", __func__);
                return 0;
        }
 
        /* Enable/disable GFX per cu powergating through SMU */
-       return hwmgr->hwmgr_func->enable_per_cu_power_gating(hwmgr,
+       return hwmgr->hwmgr_func->powergate_gfx(hwmgr,
                        state == AMD_PG_STATE_GATE);
 }
 

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
index 41495621d94a02b3eedbb909fbd87c0e2888ea9b..683b29a993666513d0330291ef80a11522df381a 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
@@ -416,7 +416,7 @@ int smu7_update_clock_gatings(struct pp_hwmgr *hwmgr,
  * Powerplay will only control the static per CU Power Gating.
  * Dynamic per CU Power Gating will be done in gfx.
  */
-int smu7_enable_per_cu_power_gating(struct pp_hwmgr *hwmgr, bool enable)
+int smu7_powergate_gfx(struct pp_hwmgr *hwmgr, bool enable)
 {
        struct amdgpu_device *adev = hwmgr->adev;
 

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h
index be7f66d2b234aeb5a2b3b6b2a8194fe134c466be..fc8f8a6acc7223d7bb6b812e5e74e91e35dd430d 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h
@@ -33,6 +33,6 @@ int smu7_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate);
 int smu7_disable_clock_power_gating(struct pp_hwmgr *hwmgr);
 int smu7_update_clock_gatings(struct pp_hwmgr *hwmgr,
                                        const uint32_t *msg_id);
-int smu7_enable_per_cu_power_gating(struct pp_hwmgr *hwmgr, bool enable);
+int smu7_powergate_gfx(struct pp_hwmgr *hwmgr, bool enable);
 
 #endif

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index b89d6fb8559b8e7920b0b566b201b99b5cb36c44..de295b7442b7b0d5ce2e82dd1d6171a98d315059 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -5044,7 +5044,7 @@ static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
        .get_fan_control_mode = smu7_get_fan_control_mode,
        .force_clock_level = smu7_force_clock_level,
        .print_clock_levels = smu7_print_clock_levels,
-       .enable_per_cu_power_gating = smu7_enable_per_cu_power_gating,
+       .powergate_gfx = smu7_powergate_gfx,
        .get_sclk_od = smu7_get_sclk_od,
        .set_sclk_od = smu7_set_sclk_od,
        .get_mclk_od = smu7_get_mclk_od,

diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index 9b07d6e14ec69d606c80a162b135525734ab5e5d..95e29a22e44510646707363ab9d4992b43099a4c 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -302,7 +302,7 @@ struct pp_hwmgr_func {
        int (*power_off_asic)(struct pp_hwmgr *hwmgr);
        int (*force_clock_level)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask);
        int (*print_clock_levels)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf);
-       int (*enable_per_cu_power_gating)(struct pp_hwmgr *hwmgr, bool enable);
+       int (*powergate_gfx)(struct pp_hwmgr *hwmgr, bool enable);
        int (*get_sclk_od)(struct pp_hwmgr *hwmgr);
        int (*set_sclk_od)(struct pp_hwmgr *hwmgr, uint32_t value);
        int (*get_mclk_od)(struct pp_hwmgr *hwmgr);