/* The GICv3 driver only needs to be initialized in EL3 */
static uintptr_t rdistif_base_addrs[PLATFORM_CORE_COUNT];
-/* Array of Group1 secure interrupts to be configured by the gic driver */
-static const unsigned int g1s_interrupt_array[] = {
- PLAT_ARM_G1S_IRQS
-};
-
-/* Array of Group0 interrupts to be configured by the gic driver */
-static const unsigned int g0_interrupt_array[] = {
- PLAT_ARM_G0_IRQS
+static const interrupt_prop_t arm_interrupt_props[] = {
+ PLAT_ARM_G1S_IRQ_PROPS(INTR_GROUP1S),
+ PLAT_ARM_G0_IRQ_PROPS(INTR_GROUP0)
};
+ /*
+ * We save and restore the GICv3 context on system suspend. Allocate the
+ * data in the designated EL3 Secure carve-out memory
+ */
+ gicv3_redist_ctx_t rdist_ctx __section("arm_el3_tzc_dram");
+ gicv3_dist_ctx_t dist_ctx __section("arm_el3_tzc_dram");
+
/*
* MPIDR hashing function for translating MPIDRs read from GICR_TYPER register
* to core position.