dm: core: Sort the uclasses
authorSimon Glass <sjg@chromium.org>
Wed, 15 Apr 2015 03:03:19 +0000 (21:03 -0600)
committerTom Warren <twarren@nvidia.com>
Wed, 13 May 2015 16:24:00 +0000 (09:24 -0700)
Sort uclasses into alphabetical order and tidy up the comments.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
include/dm/uclass-id.h

index 08f1bad938589c07bac088da19d181566bd8de7e..b17528d207cdbf3f8d90b0a4dfaf7017bd6e9567 100644 (file)
@@ -22,31 +22,31 @@ enum uclass_id {
        UCLASS_I2C_EMUL,        /* sandbox I2C device emulator */
        UCLASS_PCI_EMUL,        /* sandbox PCI device emulator */
        UCLASS_USB_EMUL,        /* sandbox USB bus device emulator */
-       UCLASS_SIMPLE_BUS,
+       UCLASS_SIMPLE_BUS,      /* bus with child devices */
 
-       /* U-Boot uclasses start here */
+       /* U-Boot uclasses start here - in alphabetical order */
+       UCLASS_CPU,             /* CPU, typically part of an SoC */
+       UCLASS_CROS_EC,         /* Chrome OS EC */
+       UCLASS_ETH,             /* Ethernet device */
        UCLASS_GPIO,            /* Bank of general-purpose I/O pins */
-       UCLASS_SERIAL,          /* Serial UART */
-       UCLASS_SPI,             /* SPI bus */
-       UCLASS_SPI_GENERIC,     /* Generic SPI flash target */
-       UCLASS_SPI_FLASH,       /* SPI flash */
-       UCLASS_CROS_EC, /* Chrome OS EC */
-       UCLASS_THERMAL,         /* Thermal sensor */
        UCLASS_I2C,             /* I2C bus */
-       UCLASS_I2C_GENERIC,     /* Generic I2C device */
        UCLASS_I2C_EEPROM,      /* I2C EEPROM device */
+       UCLASS_I2C_GENERIC,     /* Generic I2C device */
+       UCLASS_LPC,             /* x86 'low pin count' interface */
+       UCLASS_MASS_STORAGE,    /* Mass storage device */
        UCLASS_MOD_EXP,         /* RSA Mod Exp device */
+       UCLASS_PCH,             /* x86 platform controller hub */
        UCLASS_PCI,             /* PCI bus */
        UCLASS_PCI_GENERIC,     /* Generic PCI bus device */
-       UCLASS_PCH,             /* x86 platform controller hub */
-       UCLASS_ETH,             /* Ethernet device */
-       UCLASS_LPC,             /* x86 'low pin count' interface */
+       UCLASS_RTC,             /* Real time clock device */
+       UCLASS_SERIAL,          /* Serial UART */
+       UCLASS_SPI,             /* SPI bus */
+       UCLASS_SPI_GENERIC,     /* Generic SPI flash target */
+       UCLASS_SPI_FLASH,       /* SPI flash */
+       UCLASS_THERMAL,         /* Thermal sensor */
        UCLASS_USB,             /* USB bus */
-       UCLASS_USB_HUB,         /* USB hub */
        UCLASS_USB_DEV_GENERIC, /* USB generic device */
-       UCLASS_MASS_STORAGE,    /* Mass storage device */
-       UCLASS_CPU,             /* CPU, typically part of an SoC */
-       UCLASS_RTC,             /* Real time clock device */
+       UCLASS_USB_HUB,         /* USB hub */
 
        UCLASS_COUNT,
        UCLASS_INVALID = -1,