/*
* TLB debugging functions:
*/
+extern void dump_tlb_regs(void);
extern void dump_tlb_all(void);
#endif /* __ASM_TLBDEBUG_H */
static void sysrq_tlbdump_single(void *dummy)
{
- const int field = 2 * sizeof(unsigned long);
unsigned long flags;
spin_lock_irqsave(&show_lock, flags);
pr_info("CPU%d:\n", smp_processor_id());
- pr_info("Index : %0x\n", read_c0_index());
- pr_info("Pagemask: %0x\n", read_c0_pagemask());
- pr_info("EntryHi : %0*lx\n", field, read_c0_entryhi());
- pr_info("EntryLo0: %0*lx\n", field, read_c0_entrylo0());
- pr_info("EntryLo1: %0*lx\n", field, read_c0_entrylo1());
- pr_info("Wired : %0x\n", read_c0_wired());
- pr_info("Pagegrain: %0x\n", read_c0_pagegrain());
- if (cpu_has_htw) {
- pr_info("PWField : %0*lx\n", field, read_c0_pwfield());
- pr_info("PWSize : %0*lx\n", field, read_c0_pwsize());
- pr_info("PWCtl : %0x\n", read_c0_pwctl());
- }
+ dump_tlb_regs();
pr_info("\n");
dump_tlb_all();
pr_info("\n");
asmlinkage void do_mcheck(struct pt_regs *regs)
{
- const int field = 2 * sizeof(unsigned long);
int multi_match = regs->cp0_status & ST0_TS;
enum ctx_state prev_state;
mm_segment_t old_fs = get_fs();
show_regs(regs);
if (multi_match) {
- pr_err("Index : %0x\n", read_c0_index());
- pr_err("Pagemask: %0x\n", read_c0_pagemask());
- pr_err("EntryHi : %0*lx\n", field, read_c0_entryhi());
- pr_err("EntryLo0: %0*lx\n", field, read_c0_entrylo0());
- pr_err("EntryLo1: %0*lx\n", field, read_c0_entrylo1());
- pr_err("Wired : %0x\n", read_c0_wired());
- pr_err("Pagegrain: %0x\n", read_c0_pagegrain());
- if (cpu_has_htw) {
- pr_err("PWField : %0*lx\n", field, read_c0_pwfield());
- pr_err("PWSize : %0*lx\n", field, read_c0_pwsize());
- pr_err("PWCtl : %0x\n", read_c0_pwctl());
- }
- pr_err("\n");
+ dump_tlb_regs();
+ pr_info("\n");
dump_tlb_all();
}
#include <asm/pgtable.h>
#include <asm/tlbdebug.h>
+void dump_tlb_regs(void)
+{
+ const int field = 2 * sizeof(unsigned long);
+
+ pr_info("Index : %0x\n", read_c0_index());
+ pr_info("PageMask : %0x\n", read_c0_pagemask());
+ pr_info("EntryHi : %0*lx\n", field, read_c0_entryhi());
+ pr_info("EntryLo0 : %0*lx\n", field, read_c0_entrylo0());
+ pr_info("EntryLo1 : %0*lx\n", field, read_c0_entrylo1());
+ pr_info("Wired : %0x\n", read_c0_wired());
+ pr_info("PageGrain: %0x\n", read_c0_pagegrain());
+ if (cpu_has_htw) {
+ pr_info("PWField : %0*lx\n", field, read_c0_pwfield());
+ pr_info("PWSize : %0*lx\n", field, read_c0_pwsize());
+ pr_info("PWCtl : %0x\n", read_c0_pwctl());
+ }
+}
+
static inline const char *msk2str(unsigned int mask)
{
switch (mask) {
#include <asm/pgtable.h>
#include <asm/tlbdebug.h>
+extern int r3k_have_wired_reg;
+
+void dump_tlb_regs(void)
+{
+ pr_info("Index : %0x\n", read_c0_index());
+ pr_info("EntryHi : %0lx\n", read_c0_entryhi());
+ pr_info("EntryLo : %0lx\n", read_c0_entrylo0());
+ if (r3k_have_wired_reg)
+ pr_info("Wired : %0x\n", read_c0_wired());
+}
+
static void dump_tlb(int first, int last)
{
int i;
"nop\n\t" \
".set pop\n\t")
-static int r3k_have_wired_reg; /* Should be in cpu_data? */
+int r3k_have_wired_reg; /* Should be in cpu_data? */
/* TLB operations. */
static void local_flush_tlb_from(int entry)