/* keep this initialization for compatibility with GCC < 4.4.6 */
.reserved = { 0 },
V4L2_INIT_BT_TIMINGS(GS_WIDTH_MIN, GS_WIDTH_MAX, GS_HEIGHT_MIN,
- GS_HEIGHT_MAX, GS_PIXELCLOCK_MIN, GS_PIXELCLOCK_MAX,
+ GS_HEIGHT_MAX, GS_PIXELCLOCK_MIN,
+ GS_PIXELCLOCK_MAX,
V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_SDI,
V4L2_DV_BT_CAP_PROGRESSIVE
| V4L2_DV_BT_CAP_INTERLACED)
int i;
for (i = 0; i < ARRAY_SIZE(reg_fmt); i++) {
- if (v4l2_match_dv_timings(timings, ®_fmt[i].format, 0, false))
+ if (v4l2_match_dv_timings(timings, ®_fmt[i].format, 0,
+ false))
return reg_fmt[i].reg_value | MASK_FORCE_STD;
}
if (gs->enabled)
return -EBUSY;
- /* Check if the component detect a line, a frame or something else
- * which looks like a video signal activity.*/
+ /*
+ * Check if the component detect a line, a frame or something else
+ * which looks like a video signal activity.
+ */
for (i = 0; i < 4; i++) {
gs_read_register(gs->pdev, REG_LINES_PER_FRAME + i, ®_value);
if (reg_value)
/* To force the specific format */
reg_value = get_register_timings(&gs->current_timings);
return gs_write_register(gs->pdev, REG_FORCE_FMT, reg_value);
- } else {
- /* To renable auto-detection mode */
- return gs_write_register(gs->pdev, REG_FORCE_FMT, 0x0);
}
+
+ /* To renable auto-detection mode */
+ return gs_write_register(gs->pdev, REG_FORCE_FMT, 0x0);
}
static int gs_g_input_status(struct v4l2_subdev *sd, u32 *status)
u16 reg_value, i;
int ret;
- /* Check if the component detect a line, a frame or something else
- * which looks like a video signal activity.*/
+ /*
+ * Check if the component detect a line, a frame or something else
+ * which looks like a video signal activity.
+ */
for (i = 0; i < 4; i++) {
ret = gs_read_register(gs->pdev,
REG_LINES_PER_FRAME + i, ®_value);
};
static const struct v4l2_subdev_pad_ops gs_pad_ops = {
- .enum_dv_timings= gs_enum_dv_timings,
+ .enum_dv_timings = gs_enum_dv_timings,
.dv_timings_cap = gs_dv_timings_cap,
};