ramips: fix mt7620 pinmux for second SPI

The mt7620 doesn't have a pinmux group named spi_cs1. The cs1 is part
of the "spi refclk" group. The function "spi refclk" enables the second
chip select.

On reset, the pins of the "spi refclk" group are used as reference
clock and GPIO.

Signed-off-by: Mathias Kresin <dev@kresin.me>
(cherry picked from commit 3601c3de23f15e2735adc4becdca14c803b6b1a5)

diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi
index 62e1985aa281c2eca28c32871d52036adc1f1dde..d1edc3bdf77fbf4e34b49e668a4d945858450675 100644 (file)
--- a/target/linux/ramips/dts/mt7620a.dtsi
+++ b/target/linux/ramips/dts/mt7620a.dtsi
@@ -339,8 +339,8 @@
 
                spi_cs1: spi1 {
                        spi1 {
-                               ralink,group = "spi_cs1";
-                               ralink,function = "spi_cs1";
+                               ralink,group = "spi refclk";
+                               ralink,function = "spi refclk";
                        };
                };
 

diff --git a/target/linux/ramips/dts/mt7620n.dtsi b/target/linux/ramips/dts/mt7620n.dtsi
index 58fd263d7d7a9744d02d0ee2d5c88a6447b238c1..7ca14713478a7ab6cc6cf03a5c93ebe09ad25f7d 100644 (file)
--- a/target/linux/ramips/dts/mt7620n.dtsi
+++ b/target/linux/ramips/dts/mt7620n.dtsi
@@ -260,8 +260,8 @@
 
                spi_cs1: spi1 {
                        spi1 {
-                               ralink,group = "spi_cs1";
-                               ralink,function = "spi_cs1";
+                               ralink,group = "spi refclk";
+                               ralink,function = "spi refclk";
                        };
                };