Signed-off-by: Eric Miao <eric.miao@marvell.com>
extern void __init pxa_map_io(void);
extern unsigned int get_clk_frequency_khz(int info);
-extern int pxa_last_gpio;
#define SET_BANK(__nr,__start,__size) \
mi->bank[__nr].start = (__start), \
#include <mach/gpio.h>
+int pxa_last_gpio;
+
#define GPIO0_BASE (GPIO_REGS_VIRT + 0x0000)
#define GPIO1_BASE (GPIO_REGS_VIRT + 0x0004)
#define GPIO2_BASE (GPIO_REGS_VIRT + 0x0008)
void __iomem *regbase;
};
-int pxa_last_gpio;
-
static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
{
unsigned long flags;
/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
- * Those cases currently cause holes in the GPIO number space.
+ * Those cases currently cause holes in the GPIO number space, the
+ * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
*/
+extern int pxa_last_gpio;
+
#define NR_BUILTIN_GPIO 128
static inline int gpio_get_value(unsigned gpio)