ARM: 8721/1: mm: dump: check hardware RO bit for LPAE
authorPhilip Derrin <philip@cog.systems>
Mon, 13 Nov 2017 23:55:26 +0000 (00:55 +0100)
committerRussell King <rmk+kernel@armlinux.org.uk>
Tue, 21 Nov 2017 15:10:07 +0000 (15:10 +0000)
When CONFIG_ARM_LPAE is set, the PMD dump relies on the software
read-only bit to determine whether a page is writable. This
concealed a bug which left the kernel text section writable
(AP2=0) while marked read-only in the software bit.

In a kernel with the AP2 bug, the dump looks like this:

    ---[ Kernel Mapping ]---
    0xc0000000-0xc0200000           2M RW NX SHD
    0xc0200000-0xc0600000           4M ro x  SHD
    0xc0600000-0xc0800000           2M ro NX SHD
    0xc0800000-0xc4800000          64M RW NX SHD

The fix is to check that the software and hardware bits are both
set before displaying "ro". The dump then shows the true perms:

    ---[ Kernel Mapping ]---
    0xc0000000-0xc0200000           2M RW NX SHD
    0xc0200000-0xc0600000           4M RW x  SHD
    0xc0600000-0xc0800000           2M RW NX SHD
    0xc0800000-0xc4800000          64M RW NX SHD

Fixes: ded947798469 ("ARM: 8109/1: mm: Modify pte_write and pmd_write logic for LPAE")
Signed-off-by: Philip Derrin <philip@cog.systems>
Tested-by: Neil Dick <neil@cog.systems>
Reviewed-by: Kees Cook <keescook@chromium.org>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
arch/arm/mm/dump.c

index 35ff45470dbfd5bac025eb149294307ab6ef2b7d..fc3b44028cfb22fb140ad75b621cf690c94e5a43 100644 (file)
@@ -129,8 +129,8 @@ static const struct prot_bits section_bits[] = {
                .val    = PMD_SECT_USER,
                .set    = "USR",
        }, {
-               .mask   = L_PMD_SECT_RDONLY,
-               .val    = L_PMD_SECT_RDONLY,
+               .mask   = L_PMD_SECT_RDONLY | PMD_SECT_AP2,
+               .val    = L_PMD_SECT_RDONLY | PMD_SECT_AP2,
                .set    = "ro",
                .clear  = "RW",
 #elif __LINUX_ARM_ARCH__ >= 6