x86/split_lock: Update to use X86_MATCH_INTEL_FAM6_MODEL()
authorTony Luck <tony.luck@intel.com>
Thu, 16 Apr 2020 20:57:52 +0000 (13:57 -0700)
committerThomas Gleixner <tglx@linutronix.de>
Fri, 17 Apr 2020 10:14:12 +0000 (12:14 +0200)
The SPLIT_LOCK_CPU() macro escaped the tree-wide sweep for old-style
initialization. Update to use X86_MATCH_INTEL_FAM6_MODEL().

Fixes: 6650cdd9a8cc ("x86/split_lock: Enable split lock detection by kernel")
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/20200416205754.21177-2-tony.luck@intel.com
arch/x86/kernel/cpu/intel.c

index bf08d4508ecbafd3e5c355a581fd3cd2a1a89d4b..ec0d8c74932f6775172e7bcbfa27e4aa11e93023 100644 (file)
@@ -1119,8 +1119,6 @@ void switch_to_sld(unsigned long tifn)
        sld_update_msr(!(tifn & _TIF_SLD));
 }
 
-#define SPLIT_LOCK_CPU(model) {X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY}
-
 /*
  * The following processors have the split lock detection feature. But
  * since they don't have the IA32_CORE_CAPABILITIES MSR, the feature cannot
@@ -1128,8 +1126,8 @@ void switch_to_sld(unsigned long tifn)
  * processors.
  */
 static const struct x86_cpu_id split_lock_cpu_ids[] __initconst = {
-       SPLIT_LOCK_CPU(INTEL_FAM6_ICELAKE_X),
-       SPLIT_LOCK_CPU(INTEL_FAM6_ICELAKE_L),
+       X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X,           0),
+       X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L,           0),
        {}
 };