Compile and runtime tested on lantiq/xrx200.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
LINUX_RELEASE?=1
-LINUX_VERSION-4.9 = .240
+LINUX_VERSION-4.9 = .243
LINUX_VERSION-4.14 = .206
-LINUX_KERNEL_HASH-4.9.240 = 06e470c66988da200ae95dc5d5fdfd1e1f8611e8c3445620e3566ecd0bdf776f
+LINUX_KERNEL_HASH-4.9.243 = d3aa189ca7fcc6e52d6c0333a0d7acd8789e9a492b32dbf9476e926ffaa73984
LINUX_KERNEL_HASH-4.14.206 = 1c233efaa5063983293a02d4692acc9ced9c03e18857364855d4f612347086ac
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1268,6 +1268,15 @@ static struct clk_hw *bcm2835_register_c
+@@ -1270,6 +1270,15 @@ static struct clk_hw *bcm2835_register_c
init.name = data->name;
init.flags = data->flags | CLK_IGNORE_UNUSED;
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1909,8 +1909,15 @@ static int bcm2835_clk_probe(struct plat
+@@ -1911,8 +1911,15 @@ static int bcm2835_clk_probe(struct plat
if (ret)
return ret;
}
static const struct of_device_id bcm2835_clk_of_match[] = {
-@@ -1927,7 +1934,11 @@ static struct platform_driver bcm2835_cl
+@@ -1929,7 +1936,11 @@ static struct platform_driver bcm2835_cl
.probe = bcm2835_clk_probe,
};
if (rate > best_rate && rate <= req->rate) {
best_parent = parent;
best_prate = prate;
-@@ -1277,6 +1329,13 @@ static struct clk_hw *bcm2835_register_c
+@@ -1279,6 +1331,13 @@ static struct clk_hw *bcm2835_register_c
if ((cprman_read(cprman, data->ctl_reg) & CM_ENABLE) == 0)
init.flags &= ~CLK_IS_CRITICAL;
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1876,7 +1876,12 @@ static const struct bcm2835_clk_desc clk
+@@ -1878,7 +1878,12 @@ static const struct bcm2835_clk_desc clk
.ctl_reg = CM_VECCTL,
.div_reg = CM_VECDIV,
.int_bits = 4,
};
struct bcm2835_clock_data {
-@@ -1258,7 +1259,7 @@ bcm2835_register_pll_divider(struct bcm2
+@@ -1260,7 +1261,7 @@ bcm2835_register_pll_divider(struct bcm2
init.num_parents = 1;
init.name = divider_name;
init.ops = &bcm2835_pll_divider_clk_ops;
divider = devm_kzalloc(cprman->dev, sizeof(*divider), GFP_KERNEL);
if (!divider)
-@@ -1481,7 +1482,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1483,7 +1484,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLA_CORE,
.load_mask = CM_PLLA_LOADCORE,
.hold_mask = CM_PLLA_HOLDCORE,
[BCM2835_PLLA_PER] = REGISTER_PLL_DIV(
.name = "plla_per",
.source_pll = "plla",
-@@ -1489,7 +1491,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1491,7 +1493,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLA_PER,
.load_mask = CM_PLLA_LOADPER,
.hold_mask = CM_PLLA_HOLDPER,
[BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV(
.name = "plla_dsi0",
.source_pll = "plla",
-@@ -1505,7 +1508,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1507,7 +1510,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLA_CCP2,
.load_mask = CM_PLLA_LOADCCP2,
.hold_mask = CM_PLLA_HOLDCCP2,
/* PLLB is used for the ARM's clock. */
[BCM2835_PLLB] = REGISTER_PLL(
-@@ -1529,7 +1533,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1531,7 +1535,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLB_ARM,
.load_mask = CM_PLLB_LOADARM,
.hold_mask = CM_PLLB_HOLDARM,
/*
* PLLC is the core PLL, used to drive the core VPU clock.
-@@ -1558,7 +1563,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1560,7 +1565,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLC_CORE0,
.load_mask = CM_PLLC_LOADCORE0,
.hold_mask = CM_PLLC_HOLDCORE0,
[BCM2835_PLLC_CORE1] = REGISTER_PLL_DIV(
.name = "pllc_core1",
.source_pll = "pllc",
-@@ -1566,7 +1572,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1568,7 +1574,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLC_CORE1,
.load_mask = CM_PLLC_LOADCORE1,
.hold_mask = CM_PLLC_HOLDCORE1,
[BCM2835_PLLC_CORE2] = REGISTER_PLL_DIV(
.name = "pllc_core2",
.source_pll = "pllc",
-@@ -1574,7 +1581,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1576,7 +1583,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLC_CORE2,
.load_mask = CM_PLLC_LOADCORE2,
.hold_mask = CM_PLLC_HOLDCORE2,
[BCM2835_PLLC_PER] = REGISTER_PLL_DIV(
.name = "pllc_per",
.source_pll = "pllc",
-@@ -1582,7 +1590,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1584,7 +1592,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLC_PER,
.load_mask = CM_PLLC_LOADPER,
.hold_mask = CM_PLLC_HOLDPER,
/*
* PLLD is the display PLL, used to drive DSI display panels.
-@@ -1611,7 +1620,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1613,7 +1622,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLD_CORE,
.load_mask = CM_PLLD_LOADCORE,
.hold_mask = CM_PLLD_HOLDCORE,
[BCM2835_PLLD_PER] = REGISTER_PLL_DIV(
.name = "plld_per",
.source_pll = "plld",
-@@ -1619,7 +1629,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1621,7 +1631,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLD_PER,
.load_mask = CM_PLLD_LOADPER,
.hold_mask = CM_PLLD_HOLDPER,
[BCM2835_PLLD_DSI0] = REGISTER_PLL_DIV(
.name = "plld_dsi0",
.source_pll = "plld",
-@@ -1664,7 +1675,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1666,7 +1677,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLH_RCAL,
.load_mask = CM_PLLH_LOADRCAL,
.hold_mask = 0,
[BCM2835_PLLH_AUX] = REGISTER_PLL_DIV(
.name = "pllh_aux",
.source_pll = "pllh",
-@@ -1672,7 +1684,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1674,7 +1686,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLH_AUX,
.load_mask = CM_PLLH_LOADAUX,
.hold_mask = 0,
[BCM2835_PLLH_PIX] = REGISTER_PLL_DIV(
.name = "pllh_pix",
.source_pll = "pllh",
-@@ -1680,7 +1693,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1682,7 +1695,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLH_PIX,
.load_mask = CM_PLLH_LOADPIX,
.hold_mask = 0,
init.num_parents = 1;
init.name = data->name;
init.ops = &bcm2835_pll_clk_ops;
-@@ -1301,18 +1330,22 @@ static struct clk_hw *bcm2835_register_c
+@@ -1303,18 +1332,22 @@ static struct clk_hw *bcm2835_register_c
struct bcm2835_clock *clock;
struct clk_init_data init;
const char *parents[1 << CM_SRC_BITS];
}
memset(&init, 0, sizeof(init));
-@@ -1448,6 +1481,47 @@ static const char *const bcm2835_clock_v
+@@ -1450,6 +1483,47 @@ static const char *const bcm2835_clock_v
__VA_ARGS__)
/*
* the real definition of all the pll, pll_dividers and clocks
* these make use of the above REGISTER_* macros
*/
-@@ -1910,6 +1984,18 @@ static const struct bcm2835_clk_desc clk
+@@ -1912,6 +1986,18 @@ static const struct bcm2835_clk_desc clk
.div_reg = CM_DSI1EDIV,
.int_bits = 4,
.frac_bits = 8),
/* the gates */
-@@ -1968,8 +2054,19 @@ static int bcm2835_clk_probe(struct plat
+@@ -1970,8 +2056,19 @@ static int bcm2835_clk_probe(struct plat
if (IS_ERR(cprman->regs))
return PTR_ERR(cprman->regs);
return 0;
}
-@@ -1780,7 +1850,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1782,7 +1852,8 @@ static const struct bcm2835_clk_desc clk
.ctl_reg = CM_OTPCTL,
.div_reg = CM_OTPDIV,
.int_bits = 4,
/*
* Used for a 1Mhz clock for the system clocksource, and also used
* bythe watchdog timer and the camera pulse generator.
-@@ -1814,13 +1885,15 @@ static const struct bcm2835_clk_desc clk
+@@ -1816,13 +1887,15 @@ static const struct bcm2835_clk_desc clk
.ctl_reg = CM_H264CTL,
.div_reg = CM_H264DIV,
.int_bits = 4,
/*
* Secondary SDRAM clock. Used for low-voltage modes when the PLL
-@@ -1831,13 +1904,15 @@ static const struct bcm2835_clk_desc clk
+@@ -1833,13 +1906,15 @@ static const struct bcm2835_clk_desc clk
.ctl_reg = CM_SDCCTL,
.div_reg = CM_SDCDIV,
.int_bits = 6,
/*
* VPU clock. This doesn't have an enable bit, since it drives
* the bus for everything else, and is special so it doesn't need
-@@ -1851,7 +1926,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1853,7 +1928,8 @@ static const struct bcm2835_clk_desc clk
.int_bits = 12,
.frac_bits = 8,
.flags = CLK_IS_CRITICAL,
/* clocks with per parent mux */
[BCM2835_CLOCK_AVEO] = REGISTER_PER_CLK(
-@@ -1859,19 +1935,22 @@ static const struct bcm2835_clk_desc clk
+@@ -1861,19 +1937,22 @@ static const struct bcm2835_clk_desc clk
.ctl_reg = CM_AVEOCTL,
.div_reg = CM_AVEODIV,
.int_bits = 4,
[BCM2835_CLOCK_DFT] = REGISTER_PER_CLK(
.name = "dft",
.ctl_reg = CM_DFTCTL,
-@@ -1883,7 +1962,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1885,7 +1964,8 @@ static const struct bcm2835_clk_desc clk
.ctl_reg = CM_DPICTL,
.div_reg = CM_DPIDIV,
.int_bits = 4,
/* Arasan EMMC clock */
[BCM2835_CLOCK_EMMC] = REGISTER_PER_CLK(
-@@ -1891,7 +1971,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1893,7 +1973,8 @@ static const struct bcm2835_clk_desc clk
.ctl_reg = CM_EMMCCTL,
.div_reg = CM_EMMCDIV,
.int_bits = 4,
/* General purpose (GPIO) clocks */
[BCM2835_CLOCK_GP0] = REGISTER_PER_CLK(
-@@ -1900,7 +1981,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1902,7 +1983,8 @@ static const struct bcm2835_clk_desc clk
.div_reg = CM_GP0DIV,
.int_bits = 12,
.frac_bits = 12,
[BCM2835_CLOCK_GP1] = REGISTER_PER_CLK(
.name = "gp1",
.ctl_reg = CM_GP1CTL,
-@@ -1908,7 +1990,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1910,7 +1992,8 @@ static const struct bcm2835_clk_desc clk
.int_bits = 12,
.frac_bits = 12,
.flags = CLK_IS_CRITICAL,
[BCM2835_CLOCK_GP2] = REGISTER_PER_CLK(
.name = "gp2",
.ctl_reg = CM_GP2CTL,
-@@ -1923,40 +2006,46 @@ static const struct bcm2835_clk_desc clk
+@@ -1925,40 +2008,46 @@ static const struct bcm2835_clk_desc clk
.ctl_reg = CM_HSMCTL,
.div_reg = CM_HSMDIV,
.int_bits = 4,
/* TV encoder clock. Only operating frequency is 108Mhz. */
[BCM2835_CLOCK_VEC] = REGISTER_PER_CLK(
-@@ -1969,7 +2058,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1971,7 +2060,8 @@ static const struct bcm2835_clk_desc clk
* Allow rate change propagation only on PLLH_AUX which is
* assigned index 7 in the parent array.
*/
/* dsi clocks */
[BCM2835_CLOCK_DSI0E] = REGISTER_PER_CLK(
-@@ -1977,25 +2067,29 @@ static const struct bcm2835_clk_desc clk
+@@ -1979,25 +2069,29 @@ static const struct bcm2835_clk_desc clk
.ctl_reg = CM_DSI0ECTL,
.div_reg = CM_DSI0EDIV,
.int_bits = 4,
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1372,6 +1372,11 @@ bcm2835_register_pll_divider(struct bcm2
+@@ -1374,6 +1374,11 @@ bcm2835_register_pll_divider(struct bcm2
divider->div.hw.init = &init;
divider->div.table = NULL;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
if (!pll)
return NULL;
-@@ -1373,8 +1378,10 @@ bcm2835_register_pll_divider(struct bcm2
+@@ -1375,8 +1380,10 @@ bcm2835_register_pll_divider(struct bcm2
divider->div.table = NULL;
if (!(cprman_read(cprman, data->cm_reg) & data->hold_mask)) {
}
divider->cprman = cprman;
-@@ -2110,6 +2117,8 @@ static const struct bcm2835_clk_desc clk
+@@ -2112,6 +2119,8 @@ static const struct bcm2835_clk_desc clk
.ctl_reg = CM_PERIICTL),
};
/*
* Permanently take a reference on the parent of the SDRAM clock.
*
-@@ -2129,6 +2138,19 @@ static int bcm2835_mark_sdc_parent_criti
+@@ -2131,6 +2140,19 @@ static int bcm2835_mark_sdc_parent_criti
return clk_prepare_enable(parent);
}
static int bcm2835_clk_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
-@@ -2138,6 +2160,7 @@ static int bcm2835_clk_probe(struct plat
+@@ -2140,6 +2162,7 @@ static int bcm2835_clk_probe(struct plat
const struct bcm2835_clk_desc *desc;
const size_t asize = ARRAY_SIZE(clk_desc_array);
size_t i;
int ret;
cprman = devm_kzalloc(dev, sizeof(*cprman) +
-@@ -2153,6 +2176,13 @@ static int bcm2835_clk_probe(struct plat
+@@ -2155,6 +2178,13 @@ static int bcm2835_clk_probe(struct plat
if (IS_ERR(cprman->regs))
return PTR_ERR(cprman->regs);
return received;
--- a/drivers/net/ethernet/freescale/gianfar.c
+++ b/drivers/net/ethernet/freescale/gianfar.c
-@@ -3203,7 +3203,7 @@ static int gfar_poll_rx_sq(struct napi_s
+@@ -3195,7 +3195,7 @@ static int gfar_poll_rx_sq(struct napi_s
if (work_done < budget) {
u32 imask;
/* Clear the halt bit in RSTAT */
gfar_write(®s->rstat, gfargrp->rstat);
-@@ -3292,7 +3292,7 @@ static int gfar_poll_rx(struct napi_stru
+@@ -3284,7 +3284,7 @@ static int gfar_poll_rx(struct napi_stru
if (!num_act_queues) {
u32 imask;
--- a/drivers/net/ethernet/ibm/ibmveth.c
+++ b/drivers/net/ethernet/ibm/ibmveth.c
-@@ -1323,7 +1323,7 @@ static int ibmveth_poll(struct napi_stru
+@@ -1334,7 +1334,7 @@ static int ibmveth_poll(struct napi_stru
ibmveth_replenish_task(adapter);
if (frames_processed < budget) {
writel(irq->mask, adpt->base + EMAC_INT_MASK);
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
-@@ -7578,7 +7578,7 @@ static int rtl8169_poll(struct napi_stru
+@@ -7582,7 +7582,7 @@ static int rtl8169_poll(struct napi_stru
}
if (work_done < budget) {
if (more_to_do)
--- a/drivers/staging/octeon/ethernet-rx.c
+++ b/drivers/staging/octeon/ethernet-rx.c
-@@ -429,7 +429,7 @@ static int cvm_oct_napi_poll(struct napi
+@@ -433,7 +433,7 @@ static int cvm_oct_napi_poll(struct napi
if (rx_count < budget) {
/* No more work */
--- a/init/Kconfig
+++ b/init/Kconfig
-@@ -2122,6 +2122,13 @@ config TRIM_UNUSED_KSYMS
+@@ -2123,6 +2123,13 @@ config TRIM_UNUSED_KSYMS
If unsure, or if you need to build out-of-tree modules, say N.
+#endif
--- a/init/Kconfig
+++ b/init/Kconfig
-@@ -1298,6 +1298,10 @@ config RELAY
+@@ -1299,6 +1299,10 @@ config RELAY
If unsure, say N.
--- a/init/Kconfig
+++ b/init/Kconfig
-@@ -1370,6 +1370,17 @@ config SYSCTL_ARCH_UNALIGN_ALLOW
+@@ -1371,6 +1371,17 @@ config SYSCTL_ARCH_UNALIGN_ALLOW
the unaligned access emulation.
see arch/parisc/kernel/unaligned.c for reference
--- a/init/Kconfig
+++ b/init/Kconfig
-@@ -1694,6 +1694,15 @@ config EMBEDDED
+@@ -1695,6 +1695,15 @@ config EMBEDDED
an embedded system so certain expert options are available
for configuration.
/*
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
-@@ -226,6 +226,18 @@ static int fsl_usb2_mph_dr_of_probe(stru
+@@ -229,6 +229,18 @@ static int fsl_usb2_mph_dr_of_probe(stru
of_property_read_bool(np, "fsl,usb-erratum-a007792");
pdata->has_fsl_erratum_a005275 =
of_property_read_bool(np, "fsl,usb-erratum-a005275");
--- a/drivers/staging/octeon/ethernet.c
+++ b/drivers/staging/octeon/ethernet.c
-@@ -684,6 +684,7 @@ static int cvm_oct_probe(struct platform
+@@ -685,6 +685,7 @@ static int cvm_oct_probe(struct platform
int interface;
int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE;
int qos;
struct device_node *pip;
octeon_mdiobus_force_mod_depencency();
-@@ -800,13 +801,19 @@ static int cvm_oct_probe(struct platform
+@@ -801,13 +802,19 @@ static int cvm_oct_probe(struct platform
}
num_interfaces = cvmx_helper_get_number_of_interfaces();
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
-@@ -1150,5 +1151,6 @@ module_platform_driver(korina_driver);
+@@ -1151,5 +1152,6 @@ module_platform_driver(korina_driver);
MODULE_AUTHOR("Philip Rischel <rischelp@idt.com>");
MODULE_AUTHOR("Felix Fietkau <nbd@openwrt.org>");
MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");