drm/amdkfd: Extend PM4 packets to support 8 SDMA

Extend map_queue and unmap_queue PM4 packets to support 8
SDMA engines. The new format is backward compatible.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c
index 2d5ddf199bd0d5a9f7a44b28833863ff75b942b8..91da72d0d40510bfcc2dcc46b1ebe349dabe6cd8 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c
@@ -161,6 +161,8 @@ static int pm_map_queues_v9(struct packet_manager *pm, uint32_t *buffer,
        packet->bitfields2.engine_sel =
                engine_sel__mes_map_queues__compute_vi;
        packet->bitfields2.gws_control_queue = q->gws ? 1 : 0;
+       packet->bitfields2.extended_engine_sel =
+               extended_engine_sel__mes_map_queues__legacy_engine_sel;
        packet->bitfields2.queue_type =
                queue_type__mes_map_queues__normal_compute_vi;
 
@@ -176,9 +178,15 @@ static int pm_map_queues_v9(struct packet_manager *pm, uint32_t *buffer,
                break;
        case KFD_QUEUE_TYPE_SDMA:
        case KFD_QUEUE_TYPE_SDMA_XGMI:
-               packet->bitfields2.engine_sel = q->properties.sdma_engine_id +
-                               engine_sel__mes_map_queues__sdma0_vi;
                use_static = false; /* no static queues under SDMA */
+               if (q->properties.sdma_engine_id < 2)
+                       packet->bitfields2.engine_sel = q->properties.sdma_engine_id +
+                               engine_sel__mes_map_queues__sdma0_vi;
+               else {
+                       packet->bitfields2.extended_engine_sel =
+                               extended_engine_sel__mes_map_queues__sdma0_to_7_sel;
+                       packet->bitfields2.engine_sel = q->properties.sdma_engine_id;
+               }
                break;
        default:
                WARN(1, "queue type %d", q->properties.type);
@@ -218,13 +226,23 @@ static int pm_unmap_queues_v9(struct packet_manager *pm, uint32_t *buffer,
        switch (type) {
        case KFD_QUEUE_TYPE_COMPUTE:
        case KFD_QUEUE_TYPE_DIQ:
+               packet->bitfields2.extended_engine_sel =
+                       extended_engine_sel__mes_unmap_queues__legacy_engine_sel;
                packet->bitfields2.engine_sel =
                        engine_sel__mes_unmap_queues__compute;
                break;
        case KFD_QUEUE_TYPE_SDMA:
        case KFD_QUEUE_TYPE_SDMA_XGMI:
-               packet->bitfields2.engine_sel =
-                       engine_sel__mes_unmap_queues__sdma0 + sdma_engine;
+               if (sdma_engine < 2) {
+                       packet->bitfields2.extended_engine_sel =
+                               extended_engine_sel__mes_unmap_queues__legacy_engine_sel;
+                       packet->bitfields2.engine_sel =
+                               engine_sel__mes_unmap_queues__sdma0 + sdma_engine;
+               } else {
+                       packet->bitfields2.extended_engine_sel =
+                               extended_engine_sel__mes_unmap_queues__sdma0_to_7_sel;
+                       packet->bitfields2.engine_sel = sdma_engine;
+               }
                break;
        default:
                WARN(1, "queue type %d", type);

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h b/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h
index e3e21404cfa0430f05e0beb0857f1be8a15b0509..44ed94239513b61ca504075125c4b10d78285dd1 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h
@@ -260,6 +260,10 @@ enum mes_map_queues_engine_sel_enum {
        engine_sel__mes_map_queues__sdma1_vi = 3
 };
 
+enum mes_map_queues_extended_engine_sel_enum {
+       extended_engine_sel__mes_map_queues__legacy_engine_sel = 0,
+       extended_engine_sel__mes_map_queues__sdma0_to_7_sel = 1
+};
 
 struct pm4_mes_map_queues {
        union {
@@ -269,7 +273,8 @@ struct pm4_mes_map_queues {
 
        union {
                struct {
-                       uint32_t reserved1:4;
+                       uint32_t reserved1:2;
+                       enum mes_map_queues_extended_engine_sel_enum extended_engine_sel:2;
                        enum mes_map_queues_queue_sel_enum queue_sel:2;
                        uint32_t reserved5:6;
                        uint32_t gws_control_queue:1;
@@ -382,6 +387,11 @@ enum mes_unmap_queues_engine_sel_enum {
        engine_sel__mes_unmap_queues__sdmal = 3
 };
 
+enum mes_unmap_queues_extended_engine_sel_enum {
+       extended_engine_sel__mes_unmap_queues__legacy_engine_sel = 0,
+       extended_engine_sel__mes_unmap_queues__sdma0_to_7_sel = 1
+};
+
 struct pm4_mes_unmap_queues {
        union {
                union PM4_MES_TYPE_3_HEADER   header;            /* header */
@@ -391,7 +401,7 @@ struct pm4_mes_unmap_queues {
        union {
                struct {
                        enum mes_unmap_queues_action_enum action:2;
-                       uint32_t reserved1:2;
+                       enum mes_unmap_queues_extended_engine_sel_enum extended_engine_sel:2;
                        enum mes_unmap_queues_queue_sel_enum queue_sel:2;
                        uint32_t reserved2:20;
                        enum mes_unmap_queues_engine_sel_enum engine_sel:3;