Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
EXTRA_CFLAGS += -DRTL8192S_PREPARE_FOR_NORMAL_RELEASE
EXTRA_CFLAGS += -DRTL8192SU_DISABLE_IQK=1
-EXTRA_CFLAGS += -DRTL8192SU_USE_PARAM_TXPWR=0
EXTRA_CFLAGS += -DRTL8192SU_FPGA_UNSPECIFIED_NETWORK=0
#EXTRA_CFLAGS += -DRTL8192SU_FPGA_2MAC_VERIFICATION #=0
EXTRA_CFLAGS += -DRTL8192SU_ASIC_VERIFICATION
else
{
priv->AutoloadFailFlag=FALSE;
-#if RTL8192SU_USE_PARAM_TXPWR
- priv->bTXPowerDataReadFromEEPORM = FALSE;
-#else
priv->bTXPowerDataReadFromEEPORM = TRUE;
-#endif
-
}
// Read IC Version && Channel Plan
if(!priv->AutoloadFailFlag)