drm/amd/powerplay: Add ixSWRST_COMMAND_1 in bif_5_0_d.h

Add ixSWRST_COMMAND_1 in bif_5_0_d.h.  Required by
new powerplay code for tonga and fiji.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>

diff --git a/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h b/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h
index 92b6ba0047afb8f564ff62b928fd1937fc365769..293329719bba052f6b98edf2fc1b3f320ac609b7 100644 (file)
--- a/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h
@@ -596,6 +596,7 @@
 #define mmSWRST_EP_CONTROL_0                                                    0x14ac
 #define mmCPM_CONTROL                                                           0x14b8
 #define mmGSKT_CONTROL                                                          0x14bf
+#define ixSWRST_COMMAND_1                                                       0x1400103
 #define ixLM_CONTROL                                                            0x1400120
 #define ixLM_PCIETXMUX0                                                         0x1400121
 #define ixLM_PCIETXMUX1                                                         0x1400122