#include <common.h>
#include <asm/processor.h>
+#include <asm/io.h>
#include <asm/byteorder.h>
#include <environment.h>
#ifdef CFG_FLASH_CFI_DRIVER
debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
*addr.cp = cword.c;
-#ifdef CONFIG_BLACKFIN
- asm("ssync;");
-#endif
break;
case FLASH_CFI_16BIT:
debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
cmd, cword.w,
info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
*addr.wp = cword.w;
-#ifdef CONFIG_BLACKFIN
- asm("ssync;");
-#endif
break;
case FLASH_CFI_32BIT:
debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
cmd, cword.l,
info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
*addr.lp = cword.l;
-#ifdef CONFIG_BLACKFIN
- asm("ssync;");
-#endif
break;
case FLASH_CFI_64BIT:
#ifdef DEBUG
}
#endif
*addr.llp = cword.ll;
-#ifdef CONFIG_BLACKFIN
- asm("ssync;");
-#endif
break;
}
+
+ /* Ensure all the instructions are fully finished */
+ sync();
}
static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
#include <asm/arch/hardware.h>
#endif /* XXX###XXX */
+static inline void sync(void)
+{
+}
+
/*
* Generic virtual read/write. Note that we don't support half-word
* read/writes. We define __arch_*[bl] here, and leave __arch_*w
#endif /* __KERNEL__ */
+static inline void sync(void)
+{
+}
+
#endif /* __ASM_AVR32_IO_H */
#ifndef _BLACKFIN_IO_H
#define _BLACKFIN_IO_H
+static inline void sync(void)
+{
+ __asm__ __volatile__ asm("ssync" : : : "memory");
+}
+
#ifdef __KERNEL__
#include <linux/config.h>
__OUTS(w)
__OUTS(l)
+static inline void sync(void)
+{
+}
+
#endif
-/* */
+#ifndef __ASM_M68K_IO_H_
+#define __ASM_M68K_IO_H_
+
+static inline void sync(void)
+{
+}
+
+#endif /* __ASM_M68K_IO_H_ */
#define ioremap_writethrough(physaddr, size) (physaddr)
#define ioremap_fullcache(physaddr, size) (physaddr)
+static inline void sync(void)
+{
+}
+
#endif /* __MICROBLAZE_IO_H__ */
#define dma_cache_wback(start,size) _dma_cache_wback(start,size)
#define dma_cache_inv(start,size) _dma_cache_inv(start,size)
+static inline void sync(void)
+{
+}
+
#endif /* _ASM_IO_H */
while (count--) outl (*p++, port);
}
+static inline void sync(void)
+{
+}
+
#endif /* __ASM_NIOS_IO_H_ */
#ifndef __ASM_NIOS2_IO_H_
#define __ASM_NIOS2_IO_H_
-#define sync() asm volatile ("sync" : : : "memory");
+static inline void sync(void)
+{
+ __asm__ __volatile__ ("sync" : : : "memory");
+}
extern unsigned char inb (unsigned char *port);
extern unsigned short inw (unsigned short *port);
* Acts as a barrier to ensure all previous I/O accesses have
* completed before any further ones are issued.
*/
-#define eieio() __asm__ __volatile__ ("eieio" : : : "memory");
-#define sync() __asm__ __volatile__ ("sync" : : : "memory");
+static inline void eieio(void)
+{
+ __asm__ __volatile__ ("eieio" : : : "memory");
+}
+
+static inline void sync(void)
+{
+ __asm__ __volatile__ ("sync" : : : "memory");
+}
/* Enforce in-order execution of data I/O.
* No distinction between read/write on PPC; use eieio for all three.