drm/i915: Show ring->start for the ELSP context/request queue
authorChris Wilson <chris@chris-wilson.co.uk>
Wed, 2 May 2018 10:41:50 +0000 (11:41 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Wed, 2 May 2018 14:27:22 +0000 (15:27 +0100)
Since the advent of execlists, the HW no longer executes from a single
statically assigned ring, but instead switches to a different ring for
each context (logical ringbuffer contexts as it is called). So a good way
to tally the executing context against what we have queued is by
comparing the RING_START register against our requests. Make it so.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180502104150.29874-1-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/i915_gpu_error.c
drivers/gpu/drm/i915/i915_gpu_error.h
drivers/gpu/drm/i915/intel_engine_cs.c

index 1176d068f88a1316b7149eeb6601c980ec16a706..944939947d304692c9a4f6421b71693040a483b2 100644 (file)
@@ -410,11 +410,11 @@ static void error_print_request(struct drm_i915_error_state_buf *m,
        if (!erq->seqno)
                return;
 
-       err_printf(m, "%s pid %d, ban score %d, seqno %8x:%08x, prio %d, emitted %dms, head %08x, tail %08x\n",
+       err_printf(m, "%s pid %d, ban score %d, seqno %8x:%08x, prio %d, emitted %dms, start %08x, head %08x, tail %08x\n",
                   prefix, erq->pid, erq->ban_score,
                   erq->context, erq->seqno, erq->sched_attr.priority,
                   jiffies_to_msecs(erq->jiffies - epoch),
-                  erq->head, erq->tail);
+                  erq->start, erq->head, erq->tail);
 }
 
 static void error_print_context(struct drm_i915_error_state_buf *m,
@@ -1292,6 +1292,7 @@ static void record_request(struct i915_request *request,
        erq->ban_score = atomic_read(&request->ctx->ban_score);
        erq->seqno = request->global_seqno;
        erq->jiffies = request->emitted_jiffies;
+       erq->start = i915_ggtt_offset(request->ring->vma);
        erq->head = request->head;
        erq->tail = request->tail;
 
index 0accd2ed72d9075fefdfd2e3f20b1b052d8419c0..dac0f8c4c1cfa776d3e79845a9e036361b511afd 100644 (file)
@@ -152,6 +152,7 @@ struct i915_gpu_state {
                        u32 context;
                        int ban_score;
                        u32 seqno;
+                       u32 start;
                        u32 head;
                        u32 tail;
                        struct i915_sched_attr sched_attr;
index 238c8d3da041af55187e9fd6a233008585f05851..9164e6d665f8535ff8fefe795adba9b072264c60 100644 (file)
@@ -1278,8 +1278,9 @@ static void intel_engine_print_registers(const struct intel_engine_cs *engine,
                                char hdr[80];
 
                                snprintf(hdr, sizeof(hdr),
-                                        "\t\tELSP[%d] count=%d, rq: ",
-                                        idx, count);
+                                        "\t\tELSP[%d] count=%d, ring->start=%08x, rq: ",
+                                        idx, count,
+                                        i915_ggtt_offset(rq->ring->vma));
                                print_request(m, rq, hdr);
                        } else {
                                drm_printf(m, "\t\tELSP[%d] idle\n", idx);