mtd: nand: pxa3xx: Move the data buffer clean to prepare_start_command()
authorEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Thu, 14 Nov 2013 21:25:34 +0000 (18:25 -0300)
committerBrian Norris <computersforpeace@gmail.com>
Fri, 3 Jan 2014 19:22:13 +0000 (11:22 -0800)
To allow future support of multiple page reading/writing, move the data
buffer clean out of prepare_set_command().

This is done to prevent the data buffer from being cleaned on every command
preparation, when a multiple command sequence is implemented to read/write
pages larger than the FIFO size (2 KiB).

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
drivers/mtd/nand/pxa3xx_nand.c

index db96a7fe04a146bca9489a2be36bae323a2dd998..7a164fbd7a1877d2f71a45398dc89c30a86fb783 100644 (file)
@@ -605,6 +605,9 @@ static void set_command_address(struct pxa3xx_nand_info *info,
 
 static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
 {
+       struct pxa3xx_nand_host *host = info->host[info->cs];
+       struct mtd_info *mtd = host->mtd;
+
        /* reset data and oob column point to handle data */
        info->buf_start         = 0;
        info->buf_count         = 0;
@@ -629,6 +632,19 @@ static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
                info->ndcb2 = 0;
                break;
        }
+
+       /*
+        * If we are about to issue a read command, or about to set
+        * the write address, then clean the data buffer.
+        */
+       if (command == NAND_CMD_READ0 ||
+           command == NAND_CMD_READOOB ||
+           command == NAND_CMD_SEQIN) {
+
+               info->buf_count = mtd->writesize + mtd->oobsize;
+               memset(info->data_buff, 0xFF, info->buf_count);
+       }
+
 }
 
 static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
@@ -670,16 +686,11 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
                        info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8);
 
                set_command_address(info, mtd->writesize, column, page_addr);
-               info->buf_count = mtd->writesize + mtd->oobsize;
-               memset(info->data_buff, 0xFF, info->buf_count);
                break;
 
        case NAND_CMD_SEQIN:
 
                set_command_address(info, mtd->writesize, column, page_addr);
-               info->buf_count = mtd->writesize + mtd->oobsize;
-               memset(info->data_buff, 0xFF, info->buf_count);
-
                break;
 
        case NAND_CMD_PAGEPROG: