x86/apic: Invoke perf_events_lapic_init() after enabling APIC
authorThomas Gleixner <tglx@linutronix.de>
Mon, 22 Jul 2019 18:47:07 +0000 (20:47 +0200)
committerThomas Gleixner <tglx@linutronix.de>
Thu, 25 Jul 2019 14:11:56 +0000 (16:11 +0200)
If the APIC is soft disabled then unmasking an LVT entry does not work and
the write is ignored. perf_events_lapic_init() tries to do so.

Move the invocation after the point where the APIC has been enabled.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20190722105218.962517234@linutronix.de
arch/x86/kernel/apic/apic.c

index 84032bf814766ad2337415dd728fa8dd988c75d3..fa0846d4e000a0b07550a6a5d5875e4992bf82f4 100644 (file)
@@ -1517,7 +1517,6 @@ static void setup_local_APIC(void)
        int logical_apicid, ldr_apicid;
 #endif
 
-
        if (disable_apic) {
                disable_ioapic_support();
                return;
@@ -1532,8 +1531,6 @@ static void setup_local_APIC(void)
                apic_write(APIC_ESR, 0);
        }
 #endif
-       perf_events_lapic_init();
-
        /*
         * Double-check whether this APIC is really registered.
         * This is meaningless in clustered apic mode, so we skip it.
@@ -1617,6 +1614,8 @@ static void setup_local_APIC(void)
        value |= SPURIOUS_APIC_VECTOR;
        apic_write(APIC_SPIV, value);
 
+       perf_events_lapic_init();
+
        /*
         * Set up LVT0, LVT1:
         *