realtek: more generic platform initialization

Platform startup still "guesses" the CPU clock speed by DT fixed values.
If possible take clock rates from a to be developed driver and align to
MIPS generic platfom initialization code. Pack old behaviour into a
fallback function. We might get rid of that some day.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>

diff --git a/target/linux/realtek/files-5.10/arch/mips/rtl838x/setup.c b/target/linux/realtek/files-5.10/arch/mips/rtl838x/setup.c
index e0adbf87e99f1f5c7be53cb0b0ca8a25815121d1..b4d415ab44268c2508895ec73431323fd447b40f 100644 (file)
--- a/target/linux/realtek/files-5.10/arch/mips/rtl838x/setup.c
+++ b/target/linux/realtek/files-5.10/arch/mips/rtl838x/setup.c
@@ -13,6 +13,7 @@
 #include <linux/init.h>
 #include <linux/clkdev.h>
 #include <linux/clk-provider.h>
+#include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/of_fdt.h>
 #include <linux/irqchip.h>
@@ -48,14 +49,11 @@ void __init plat_mem_setup(void)
        __dt_setup_arch(dtb);
 }
 
-void __init plat_time_init(void)
+void plat_time_init_fallback(void)
 {
        struct device_node *np;
        u32 freq = 500000000;
 
-       of_clk_init(NULL);
-       timer_probe();
-
        np = of_find_node_by_name(NULL, "cpus");
        if (!np) {
                pr_err("Missing 'cpus' DT node, using default frequency.");
@@ -66,10 +64,41 @@ void __init plat_time_init(void)
                        pr_info("CPU frequency from device tree: %dMHz", freq / 1000000);
                of_node_put(np);
        }
-
        mips_hpt_frequency = freq / 2;
 }
 
+void __init plat_time_init(void)
+{
+/*
+ * Initialization routine resembles generic MIPS plat_time_init() with
+ * lazy error handling. The final fallback is only needed until we have
+ * converted all device trees to new clock syntax.
+ */
+       struct device_node *np;
+       struct clk *clk;
+
+       of_clk_init(NULL);
+
+       mips_hpt_frequency = 0;
+       np = of_get_cpu_node(0, NULL);
+       if (!np) {
+               pr_err("Failed to get CPU node\n");
+       } else {
+               clk = of_clk_get(np, 0);
+               if (IS_ERR(clk)) {
+                       pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));
+               } else {
+                       mips_hpt_frequency = clk_get_rate(clk) / 2;
+                       clk_put(clk);
+               }
+       }
+
+       if (!mips_hpt_frequency)
+               plat_time_init_fallback();
+
+       timer_probe();
+}
+
 void __init arch_init_irq(void)
 {
        irqchip_init();