+{
+ u32 tbus_number = bus_number;
+
-+#ifdef CONFIG_IFX_PCI
++#ifdef CONFIG_PCI_LANTIQ
+ if (pcibios_host_nr() > 1) {
+ tbus_number -= pcibios_1st_host_bus_nr();
+ }
-+#endif /* CONFIG_IFX_PCI */
++#endif /* CONFIG_PCI_LANTIQ */
+ return tbus_number;
+}
+
+ }
+
+ if (read) { /* Read hack */
-+ #ifdef CONFIG_IFX_PCI
++ #ifdef CONFIG_PCI_LANTIQ
+ if (pcibios_host_nr() > 1) {
+ tvalue = ifx_pcie_bus_enum_read_hack(where, tvalue);
+ }
-+ #endif /* CONFIG_IFX_PCI */
++ #endif /* CONFIG_PCI_LANTIQ */
+ }
+ else { /* Write hack */
-+ #ifdef CONFIG_IFX_PCI
++ #ifdef CONFIG_PCI_LANTIQ
+ if (pcibios_host_nr() > 1) {
+ tvalue = ifx_pcie_bus_enum_write_hack(where, tvalue);
+ }
+{
+ u32 tbus_number = bus_number;
+
-+#ifdef CONFIG_IFX_PCI
++#ifdef CONFIG_PCI_LANTIQ
+ if (pcibios_host_nr() > 1) {
+ tbus_number -= pcibios_1st_host_bus_nr();
+ }
-+#endif /* CONFIG_IFX_PCI */
++#endif /* CONFIG_PCI_LANTIQ */
+ return tbus_number;
+}
+
+ }
+
+ if (read) { /* Read hack */
-+ #ifdef CONFIG_IFX_PCI
++ #ifdef CONFIG_PCI_LANTIQ
+ if (pcibios_host_nr() > 1) {
+ tvalue = ifx_pcie_bus_enum_read_hack(where, tvalue);
+ }
-+ #endif /* CONFIG_IFX_PCI */
++ #endif /* CONFIG_PCI_LANTIQ */
+ }
+ else { /* Write hack */
-+ #ifdef CONFIG_IFX_PCI
++ #ifdef CONFIG_PCI_LANTIQ
+ if (pcibios_host_nr() > 1) {
+ tvalue = ifx_pcie_bus_enum_write_hack(where, tvalue);
+ }