configs: zynq: Enable zynq qspi controller
authorJagan Teki <jteki@openedev.com>
Mon, 31 Aug 2015 12:08:40 +0000 (17:38 +0530)
committerJagan Teki <jteki@openedev.com>
Sun, 25 Oct 2015 14:47:02 +0000 (20:17 +0530)
Enable zynq qspi controller driver on respective zynq boards.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
configs/zynq_microzed_defconfig
configs/zynq_zc702_defconfig
configs/zynq_zc706_defconfig
configs/zynq_zc70x_defconfig
configs/zynq_zc770_xm010_defconfig
configs/zynq_zed_defconfig

index 130851e756d8b08fcbc38cb5a57ac2391b6d26fb..9cb2ca1bacf1ade4dc4d7b9356f50640fa735c49 100644 (file)
@@ -12,3 +12,4 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
+CONFIG_ZYNQ_QSPI=y
index db2e92c2c6f75e7935c4ed9ad098cf02286ad8d1..c4922f3ec30d8330ae77da8aeb2795b7c8d1e8b6 100644 (file)
@@ -11,3 +11,4 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
+CONFIG_ZYNQ_QSPI=y
index 87158ab200d4ac5c1f265f17586109602f06b3f8..b4c076ce44aaf0dee2218ab22433540bb12a3602 100644 (file)
@@ -12,3 +12,4 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
+CONFIG_ZYNQ_QSPI=y
index 4f10c8a26016082062c73bace5ba10c52885c363..97f8a5daee83eb38fda04962c5b834b00ced4d7c 100644 (file)
@@ -12,3 +12,4 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
+CONFIG_ZYNQ_QSPI=y
index 0e826bb6fcbe631a3627343f6865b1a1b5704fd0..61106df818b056faaf922f7a29e14d91dd383d33 100644 (file)
@@ -13,3 +13,4 @@ CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM010"
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
+CONFIG_ZYNQ_QSPI=y
index 0f999751675e83e522f4cff92708e96196639e36..5e128fbc787cb203a582f12eefb7b260b8ad12fe 100644 (file)
@@ -12,3 +12,4 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
+CONFIG_ZYNQ_QSPI=y