--- /dev/null
+# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_ATH79 is not set
+CONFIG_AUDIT=y
+CONFIG_AUDIT_GENERIC=y
+CONFIG_BCM63XX=y
+CONFIG_BCM63XX_CPU_6338=y
+CONFIG_BCM63XX_CPU_6345=y
+CONFIG_BCM63XX_CPU_6348=y
+CONFIG_BCM63XX_CPU_6358=y
+CONFIG_BCM63XX_ENET=y
+CONFIG_BCM63XX_PHY=y
+CONFIG_BCM63XX_WDT=y
+CONFIG_BCMA_POSSIBLE=y
+CONFIG_BOARD_BCM963XX=y
+# CONFIG_BOARD_LIVEBOX is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_CEVT_R4K=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"
+CONFIG_CMDLINE_BOOL=y
+# CONFIG_CMDLINE_OVERRIDE is not set
+CONFIG_CPU_BIG_ENDIAN=y
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_CPU_MIPS32=y
+CONFIG_CPU_MIPS32_R1=y
+CONFIG_CPU_MIPSR1=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_CRAMFS=y
+CONFIG_CSRC_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_ELF_CORE=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_74X164=y
+CONFIG_GPIO_DEVICE=y
+CONFIG_GPIO_SYSFS=y
+# CONFIG_HAMRADIO is not set
+CONFIG_HARDWARE_WATCHPOINTS=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IRQ_WORK=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HW_HAS_PCI=y
+CONFIG_HW_RANDOM=y
+CONFIG_HZ=250
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+CONFIG_IMAGE_CMDLINE_HACK=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_IRQ_CPU=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_KEXEC=y
+# CONFIG_LANTIQ is not set
+CONFIG_LEDS_GPIO=y
+# CONFIG_MINIX_FS_NATIVE_ENDIAN is not set
+CONFIG_MIPS=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_MIPS_MACHINE is not set
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_MLX4_CORE is not set
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MTD_BCM963XX=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_BE_BYTE_SWAP=y
+# CONFIG_MTD_CFI_GEOMETRY is not set
+# CONFIG_MTD_CFI_NOSWAP is not set
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PHYLIB=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_QUOTACTL is not set
+CONFIG_RELAY=y
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SERIAL_8250 is not set
+CONFIG_SERIAL_BCM63XX=y
+CONFIG_SERIAL_BCM63XX_CONSOLE=y
+CONFIG_SPI=y
+# CONFIG_SPI_BCM63XX is not set
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_GPIO=y
+CONFIG_SPI_MASTER=y
+CONFIG_SQUASHFS_EMBEDDED=y
+CONFIG_SSB=y
+CONFIG_SSB_B43_PCI_BRIDGE=y
+CONFIG_SSB_BLOCKIO=y
+# CONFIG_SSB_DRIVER_MIPS is not set
+CONFIG_SSB_DRIVER_PCICORE=y
+CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
+CONFIG_SSB_PCIHOST=y
+CONFIG_SSB_PCIHOST_POSSIBLE=y
+CONFIG_SSB_SPROM=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_SWCONFIG=y
+CONFIG_SYS_HAS_CPU_MIPS32_R1=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+CONFIG_USB_ARCH_HAS_XHCI=y
+CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
+CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_SUPPORT=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+CONFIG_XZ_DEC=y
+CONFIG_ZONE_DMA_FLAG=0
--- /dev/null
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -260,8 +260,10 @@ static unsigned int detect_memory_size(v
+ unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
+ u32 val;
+
+- if (BCMCPU_IS_6345())
+- return (8 * 1024 * 1024);
++ if (BCMCPU_IS_6345()) {
++ val = bcm_sdram_readl(SDRAM_MBASE_REG);
++ return (val * 8 * 1024 * 1024);
++ }
+
+ if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
+ val = bcm_sdram_readl(SDRAM_CFG_REG);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -734,6 +734,8 @@
+ #define SDRAM_CFG_BANK_SHIFT 13
+ #define SDRAM_CFG_BANK_MASK (1 << SDRAM_CFG_BANK_SHIFT)
+
++#define SDRAM_MBASE_REG 0xc
++
+ #define SDRAM_PRIO_REG 0x2C
+ #define SDRAM_PRIO_MIPS_SHIFT 29
+ #define SDRAM_PRIO_MIPS_MASK (1 << SDRAM_PRIO_MIPS_SHIFT)
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -709,15 +709,9 @@ void __init board_prom_init(void)
+ char cfe_version[32];
+ u32 val;
+
+- /* read base address of boot chip select (0)
+- * 6345 does not have MPI but boots from standard
+- * MIPS Flash address */
+- if (BCMCPU_IS_6345())
+- val = 0x1fc00000;
+- else {
+- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+- val &= MPI_CSBASE_BASE_MASK;
+- }
++ /* read base address of boot chip select (0) */
++ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
++ val &= MPI_CSBASE_BASE_MASK;
+ boot_addr = (u8 *)KSEG1ADDR(val);
+
+ /* dump cfe version */
+@@ -893,12 +887,9 @@ int __init board_register_devices(void)
+ bcm63xx_dsp_register(&board.dsp);
+
+ /* read base address of boot chip select (0) */
+- if (BCMCPU_IS_6345())
+- val = 0x1fc00000;
+- else {
+- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+- val &= MPI_CSBASE_BASE_MASK;
+- }
++ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
++ val &= MPI_CSBASE_BASE_MASK;
++
+ mtd_resources[0].start = val;
+ mtd_resources[0].end = 0x1FFFFFFF;
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -163,7 +163,7 @@ enum bcm63xx_regs_set {
+ #define BCM_6345_ENET0_BASE (0xfffe1800)
+ #define BCM_6345_ENETDMA_BASE (0xfffe2800)
+ #define BCM_6345_PCMCIA_BASE (0xfffe2028)
+-#define BCM_6345_MPI_BASE (0xdeadbeef)
++#define BCM_6345_MPI_BASE (0xfffe2000)
+ #define BCM_6345_OHCI0_BASE (0xfffe2100)
+ #define BCM_6345_OHCI_PRIV_BASE (0xfffe2200)
+ #define BCM_6345_USBH_PRIV_BASE (0xdeadbeef)
+--- a/arch/mips/bcm63xx/gpio.c
++++ b/arch/mips/bcm63xx/gpio.c
+@@ -4,7 +4,7 @@
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+- * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
++ * Copyright (C) 2008-2011 Florian Fainelli <florian@openwrt.org>
+ */
+
+ #include <linux/kernel.h>
+@@ -33,7 +33,10 @@ static void bcm63xx_gpio_set(struct gpio
+ BUG();
+
+ if (gpio < 32) {
+- reg = GPIO_DATA_LO_REG;
++ if (!BCMCPU_IS_6345())
++ reg = GPIO_DATA_LO_REG;
++ else
++ reg = GPIO_DATA_HI_REG;
+ mask = 1 << gpio;
+ v = &gpio_out_low;
+ } else {
+@@ -60,7 +63,10 @@ static int bcm63xx_gpio_get(struct gpio_
+ BUG();
+
+ if (gpio < 32) {
+- reg = GPIO_DATA_LO_REG;
++ if (!BCMCPU_IS_6345())
++ reg = GPIO_DATA_LO_REG;
++ else
++ reg = GPIO_DATA_HI_REG;
+ mask = 1 << gpio;
+ } else {
+ reg = GPIO_DATA_HI_REG;
+@@ -125,7 +131,11 @@ static struct gpio_chip bcm63xx_gpio_chi
+
+ int __init bcm63xx_gpio_init(void)
+ {
+- gpio_out_low = bcm_gpio_readl(GPIO_DATA_LO_REG);
++ if (!BCMCPU_IS_6345())
++ gpio_out_low = bcm_gpio_readl(GPIO_DATA_LO_REG);
++ else
++ gpio_out_low = bcm_gpio_readl(GPIO_DATA_HI_REG);
++
+ gpio_out_high = bcm_gpio_readl(GPIO_DATA_HI_REG);
+ bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count();
+ pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
--- /dev/null
+The bcm63xx SOC has an integrated OHCI controller, this patch adds
+platform device registration and change board code to register ohci
+device when necessary.
+
+Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
+---
+ arch/mips/bcm63xx/Kconfig | 6 ++
+ arch/mips/bcm63xx/Makefile | 3 +-
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++
+ arch/mips/bcm63xx/dev-usb-ohci.c | 49 ++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h | 6 ++
+ 5 files changed, 67 insertions(+), 1 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/dev-usb-ohci.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -16,10 +16,16 @@ config BCM63XX_CPU_6345
+ config BCM63XX_CPU_6348
+ bool "support 6348 CPU"
+ select HW_HAS_PCI
++ select USB_ARCH_HAS_OHCI
++ select USB_OHCI_BIG_ENDIAN_DESC
++ select USB_OHCI_BIG_ENDIAN_MMIO
+
+ config BCM63XX_CPU_6358
+ bool "support 6358 CPU"
+ select HW_HAS_PCI
++ select USB_ARCH_HAS_OHCI
++ select USB_OHCI_BIG_ENDIAN_DESC
++ select USB_OHCI_BIG_ENDIAN_MMIO
+ endmenu
+
+ source "arch/mips/bcm63xx/boards/Kconfig"
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -1,5 +1,6 @@
+ obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \
+- dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o
++ dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o \
++ dev-usb-ohci.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
+ obj-y += boards/
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -25,6 +25,7 @@
+ #include <bcm63xx_dev_enet.h>
+ #include <bcm63xx_dev_dsp.h>
+ #include <bcm63xx_dev_pcmcia.h>
++#include <bcm63xx_dev_usb_ohci.h>
+ #include <board_bcm963xx.h>
+
+ #define PFX "board_bcm963xx: "
+@@ -883,6 +884,9 @@ int __init board_register_devices(void)
+ !board_get_mac_address(board.enet1.mac_addr))
+ bcm63xx_enet_register(1, &board.enet1);
+
++ if (board.has_ohci0)
++ bcm63xx_ohci_register();
++
+ if (board.has_dsp)
+ bcm63xx_dsp_register(&board.dsp);
+
+--- /dev/null
++++ b/arch/mips/bcm63xx/dev-usb-ohci.c
+@@ -0,0 +1,49 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2010 Maxime Bizon <mbizon@freebox.fr>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_dev_usb_ohci.h>
++
++static struct resource ohci_resources[] = {
++ {
++ /* start & end filled at runtime */
++ .flags = IORESOURCE_MEM,
++ },
++ {
++ /* start filled at runtime */
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++static u64 ohci_dmamask = ~(u32)0;
++
++static struct platform_device bcm63xx_ohci_device = {
++ .name = "bcm63xx_ohci",
++ .id = 0,
++ .num_resources = ARRAY_SIZE(ohci_resources),
++ .resource = ohci_resources,
++ .dev = {
++ .dma_mask = &ohci_dmamask,
++ .coherent_dma_mask = 0xffffffff,
++ },
++};
++
++int __init bcm63xx_ohci_register(void)
++{
++ if (!BCMCPU_IS_6348() && !BCMCPU_IS_6358())
++ return 0;
++
++ ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
++ ohci_resources[0].end = ohci_resources[0].start;
++ ohci_resources[0].end += RSET_OHCI_SIZE - 1;
++ ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0);
++ return platform_device_register(&bcm63xx_ohci_device);
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
+@@ -0,0 +1,6 @@
++#ifndef BCM63XX_DEV_USB_OHCI_H_
++#define BCM63XX_DEV_USB_OHCI_H_
++
++int bcm63xx_ohci_register(void);
++
++#endif /* BCM63XX_DEV_USB_OHCI_H_ */
--- /dev/null
+The bcm63xx SOC has an integrated EHCI controller, this patch adds
+platform device registration and change board code to register
+EHCI device when necessary.
+
+Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
+---
+ arch/mips/bcm63xx/Kconfig | 2 +
+ arch/mips/bcm63xx/Makefile | 2 +-
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++
+ arch/mips/bcm63xx/dev-usb-ehci.c | 49 ++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h | 6 ++
+ 5 files changed, 62 insertions(+), 1 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/dev-usb-ehci.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -26,6 +26,8 @@ config BCM63XX_CPU_6358
+ select USB_ARCH_HAS_OHCI
+ select USB_OHCI_BIG_ENDIAN_DESC
+ select USB_OHCI_BIG_ENDIAN_MMIO
++ select USB_ARCH_HAS_EHCI
++ select USB_EHCI_BIG_ENDIAN_MMIO
+ endmenu
+
+ source "arch/mips/bcm63xx/boards/Kconfig"
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -1,6 +1,6 @@
+ obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \
+ dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o \
+- dev-usb-ohci.o
++ dev-usb-ohci.o dev-usb-ehci.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
+ obj-y += boards/
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -26,6 +26,7 @@
+ #include <bcm63xx_dev_dsp.h>
+ #include <bcm63xx_dev_pcmcia.h>
+ #include <bcm63xx_dev_usb_ohci.h>
++#include <bcm63xx_dev_usb_ehci.h>
+ #include <board_bcm963xx.h>
+
+ #define PFX "board_bcm963xx: "
+@@ -884,6 +885,9 @@ int __init board_register_devices(void)
+ !board_get_mac_address(board.enet1.mac_addr))
+ bcm63xx_enet_register(1, &board.enet1);
+
++ if (board.has_ehci0)
++ bcm63xx_ehci_register();
++
+ if (board.has_ohci0)
+ bcm63xx_ohci_register();
+
+--- /dev/null
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -0,0 +1,49 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2010 Maxime Bizon <mbizon@freebox.fr>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_dev_usb_ehci.h>
++
++static struct resource ehci_resources[] = {
++ {
++ /* start & end filled at runtime */
++ .flags = IORESOURCE_MEM,
++ },
++ {
++ /* start filled at runtime */
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++static u64 ehci_dmamask = ~(u32)0;
++
++static struct platform_device bcm63xx_ehci_device = {
++ .name = "bcm63xx_ehci",
++ .id = 0,
++ .num_resources = ARRAY_SIZE(ehci_resources),
++ .resource = ehci_resources,
++ .dev = {
++ .dma_mask = &ehci_dmamask,
++ .coherent_dma_mask = 0xffffffff,
++ },
++};
++
++int __init bcm63xx_ehci_register(void)
++{
++ if (!BCMCPU_IS_6358())
++ return 0;
++
++ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
++ ehci_resources[0].end = ehci_resources[0].start;
++ ehci_resources[0].end += RSET_EHCI_SIZE - 1;
++ ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0);
++ return platform_device_register(&bcm63xx_ehci_device);
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
+@@ -0,0 +1,6 @@
++#ifndef BCM63XX_DEV_USB_EHCI_H_
++#define BCM63XX_DEV_USB_EHCI_H_
++
++int bcm63xx_ehci_register(void);
++
++#endif /* BCM63XX_DEV_USB_EHCI_H_ */
--- /dev/null
+Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
+---
+ drivers/usb/host/ohci-bcm63xx.c | 166 +++++++++++++++++++++++++++++++++++++++
+ drivers/usb/host/ohci-hcd.c | 5 +
+ drivers/usb/host/ohci.h | 2 +-
+ 3 files changed, 172 insertions(+), 1 deletions(-)
+ create mode 100644 drivers/usb/host/ohci-bcm63xx.c
+
+--- /dev/null
++++ b/drivers/usb/host/ohci-bcm63xx.c
+@@ -0,0 +1,166 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2010 Maxime Bizon <mbizon@freebox.fr>
++ */
++
++#include <linux/init.h>
++#include <linux/clk.h>
++#include <linux/platform_device.h>
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++
++static struct clk *usb_host_clock;
++
++static int __devinit ohci_bcm63xx_start(struct usb_hcd *hcd)
++{
++ struct ohci_hcd *ohci = hcd_to_ohci(hcd);
++ int ret;
++
++ /*
++ * port 2 can be shared with USB slave, but all boards seem to
++ * have only one host port populated, so we can hardcode it
++ */
++ ohci->num_ports = 1;
++
++ ret = ohci_init(ohci);
++ if (ret < 0)
++ return ret;
++
++ ret = ohci_run(ohci);
++ if (ret < 0) {
++ err("can't start %s", hcd->self.bus_name);
++ ohci_stop(hcd);
++ return ret;
++ }
++ return 0;
++}
++
++static const struct hc_driver ohci_bcm63xx_hc_driver = {
++ .description = hcd_name,
++ .product_desc = "BCM63XX integrated OHCI controller",
++ .hcd_priv_size = sizeof(struct ohci_hcd),
++
++ .irq = ohci_irq,
++ .flags = HCD_USB11 | HCD_MEMORY,
++ .start = ohci_bcm63xx_start,
++ .stop = ohci_stop,
++ .shutdown = ohci_shutdown,
++ .urb_enqueue = ohci_urb_enqueue,
++ .urb_dequeue = ohci_urb_dequeue,
++ .endpoint_disable = ohci_endpoint_disable,
++ .get_frame_number = ohci_get_frame,
++ .hub_status_data = ohci_hub_status_data,
++ .hub_control = ohci_hub_control,
++ .start_port_reset = ohci_start_port_reset,
++};
++
++static int __devinit ohci_hcd_bcm63xx_drv_probe(struct platform_device *pdev)
++{
++ struct resource *res_mem;
++ struct usb_hcd *hcd;
++ struct ohci_hcd *ohci;
++ u32 reg;
++ int ret, irq;
++
++ res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ irq = platform_get_irq(pdev, 0);
++ if (!res_mem || irq < 0)
++ return -ENODEV;
++
++ if (BCMCPU_IS_6348()) {
++ struct clk *clk;
++ /* enable USB host clock */
++ clk = clk_get(&pdev->dev, "usbh");
++ if (IS_ERR(clk))
++ return -ENODEV;
++
++ clk_enable(clk);
++ usb_host_clock = clk;
++ bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG);
++
++ } else if (BCMCPU_IS_6358()) {
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_REG);
++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_REG);
++ /*
++ * The magic value comes for the original vendor BSP
++ * and is needed for USB to work. Datasheet does not
++ * help, so the magic value is used as-is.
++ */
++ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, USBH_PRIV_TEST_REG);
++ } else
++ return 0;
++
++ hcd = usb_create_hcd(&ohci_bcm63xx_hc_driver, &pdev->dev, "bcm63xx");
++ if (!hcd)
++ return -ENOMEM;
++ hcd->rsrc_start = res_mem->start;
++ hcd->rsrc_len = res_mem->end - res_mem->start + 1;
++
++ if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
++ pr_debug("request_mem_region failed\n");
++ ret = -EBUSY;
++ goto out;
++ }
++
++ hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
++ if (!hcd->regs) {
++ pr_debug("ioremap failed\n");
++ ret = -EIO;
++ goto out1;
++ }
++
++ ohci = hcd_to_ohci(hcd);
++ ohci->flags |= OHCI_QUIRK_BE_MMIO | OHCI_QUIRK_BE_DESC |
++ OHCI_QUIRK_FRAME_NO;
++ ohci_hcd_init(ohci);
++
++ ret = usb_add_hcd(hcd, irq, IRQF_DISABLED);
++ if (ret)
++ goto out2;
++
++ platform_set_drvdata(pdev, hcd);
++ return 0;
++
++out2:
++ iounmap(hcd->regs);
++out1:
++ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
++out:
++ usb_put_hcd(hcd);
++ return ret;
++}
++
++static int __devexit ohci_hcd_bcm63xx_drv_remove(struct platform_device *pdev)
++{
++ struct usb_hcd *hcd;
++
++ hcd = platform_get_drvdata(pdev);
++ usb_remove_hcd(hcd);
++ iounmap(hcd->regs);
++ usb_put_hcd(hcd);
++ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
++ if (usb_host_clock) {
++ clk_disable(usb_host_clock);
++ clk_put(usb_host_clock);
++ }
++ platform_set_drvdata(pdev, NULL);
++ return 0;
++}
++
++static struct platform_driver ohci_hcd_bcm63xx_driver = {
++ .probe = ohci_hcd_bcm63xx_drv_probe,
++ .remove = __devexit_p(ohci_hcd_bcm63xx_drv_remove),
++ .shutdown = usb_hcd_platform_shutdown,
++ .driver = {
++ .name = "bcm63xx_ohci",
++ .owner = THIS_MODULE,
++ },
++};
++
++MODULE_ALIAS("platform:bcm63xx_ohci");
+--- a/drivers/usb/host/ohci-hcd.c
++++ b/drivers/usb/host/ohci-hcd.c
+@@ -1055,6 +1055,11 @@ MODULE_LICENSE ("GPL");
+ #define PLATFORM_DRIVER ohci_hcd_da8xx_driver
+ #endif
+
++#ifdef CONFIG_BCM63XX
++#include "ohci-bcm63xx.c"
++#define PLATFORM_DRIVER ohci_hcd_bcm63xx_driver
++#endif
++
+ #ifdef CONFIG_USB_OHCI_SH
+ #include "ohci-sh.c"
+ #define PLATFORM_DRIVER ohci_hcd_sh_driver
+--- a/drivers/usb/host/ohci.h
++++ b/drivers/usb/host/ohci.h
+@@ -645,7 +645,7 @@ static inline u32 hc32_to_cpup (const st
+ * some big-endian SOC implementations. Same thing happens with PSW access.
+ */
+
+-#ifdef CONFIG_PPC_MPC52xx
++#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_BCM63XX)
+ #define big_endian_frame_no_quirk(ohci) (ohci->flags & OHCI_QUIRK_FRAME_NO)
+ #else
+ #define big_endian_frame_no_quirk(ohci) 0
--- /dev/null
+Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
+---
+ drivers/usb/host/ehci-bcm63xx.c | 154 +++++++++++++++++++++++++++++++++++++++
+ drivers/usb/host/ehci-hcd.c | 5 +
+ 2 files changed, 159 insertions(+), 0 deletions(-)
+ create mode 100644 drivers/usb/host/ehci-bcm63xx.c
+
+--- /dev/null
++++ b/drivers/usb/host/ehci-bcm63xx.c
+@@ -0,0 +1,155 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ */
++
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++
++static int ehci_bcm63xx_setup(struct usb_hcd *hcd)
++{
++ struct ehci_hcd *ehci = hcd_to_ehci(hcd);
++ int retval;
++
++ retval = ehci_halt(ehci);
++ if (retval)
++ return retval;
++
++ retval = ehci_init(hcd);
++ if (retval)
++ return retval;
++
++ ehci_reset(ehci);
++ ehci_port_power(ehci, 0);
++
++ return retval;
++}
++
++
++static const struct hc_driver ehci_bcm63xx_hc_driver = {
++ .description = hcd_name,
++ .product_desc = "BCM63XX integrated EHCI controller",
++ .hcd_priv_size = sizeof(struct ehci_hcd),
++
++ .irq = ehci_irq,
++ .flags = HCD_MEMORY | HCD_USB2,
++
++ .reset = ehci_bcm63xx_setup,
++ .start = ehci_run,
++ .stop = ehci_stop,
++ .shutdown = ehci_shutdown,
++
++ .urb_enqueue = ehci_urb_enqueue,
++ .urb_dequeue = ehci_urb_dequeue,
++ .endpoint_disable = ehci_endpoint_disable,
++
++ .get_frame_number = ehci_get_frame,
++
++ .hub_status_data = ehci_hub_status_data,
++ .hub_control = ehci_hub_control,
++ .bus_suspend = ehci_bus_suspend,
++ .bus_resume = ehci_bus_resume,
++ .relinquish_port = ehci_relinquish_port,
++ .port_handed_over = ehci_port_handed_over,
++};
++
++static int __devinit ehci_hcd_bcm63xx_drv_probe(struct platform_device *pdev)
++{
++ struct resource *res_mem;
++ struct usb_hcd *hcd;
++ struct ehci_hcd *ehci;
++ u32 reg;
++ int ret, irq;
++
++ res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ irq = platform_get_irq(pdev, 0);;
++ if (!res_mem || irq < 0)
++ return -ENODEV;
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_REG);
++ reg &= ~USBH_PRIV_SWAP_EHCI_DATA_MASK;
++ reg |= USBH_PRIV_SWAP_EHCI_ENDN_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_REG);
++
++ /*
++ * The magic value comes for the original vendor BSP and is
++ * needed for USB to work. Datasheet does not help, so the
++ * magic value is used as-is.
++ */
++ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, USBH_PRIV_TEST_REG);
++
++ hcd = usb_create_hcd(&ehci_bcm63xx_hc_driver, &pdev->dev, "bcm63xx");
++ if (!hcd)
++ return -ENOMEM;
++ hcd->rsrc_start = res_mem->start;
++ hcd->rsrc_len = res_mem->end - res_mem->start + 1;
++
++ if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
++ pr_debug("request_mem_region failed\n");
++ ret = -EBUSY;
++ goto out;
++ }
++
++ hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
++ if (!hcd->regs) {
++ pr_debug("ioremap failed\n");
++ ret = -EIO;
++ goto out1;
++ }
++
++ ehci = hcd_to_ehci(hcd);
++ ehci->big_endian_mmio = 1;
++ ehci->big_endian_desc = 0;
++ ehci->caps = hcd->regs;
++ ehci->regs = hcd->regs +
++ HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
++ ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
++ ehci->sbrn = 0x20;
++ ehci->ignore_oc = 1;
++
++ ret = usb_add_hcd(hcd, irq, IRQF_DISABLED);
++ if (ret)
++ goto out2;
++
++ platform_set_drvdata(pdev, hcd);
++ return 0;
++
++out2:
++ iounmap(hcd->regs);
++out1:
++ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
++out:
++ usb_put_hcd(hcd);
++ return ret;
++}
++
++static int __devexit ehci_hcd_bcm63xx_drv_remove(struct platform_device *pdev)
++{
++ struct usb_hcd *hcd;
++
++ hcd = platform_get_drvdata(pdev);
++ usb_remove_hcd(hcd);
++ iounmap(hcd->regs);
++ usb_put_hcd(hcd);
++ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
++ platform_set_drvdata(pdev, NULL);
++ return 0;
++}
++
++static struct platform_driver ehci_hcd_bcm63xx_driver = {
++ .probe = ehci_hcd_bcm63xx_drv_probe,
++ .remove = __devexit_p(ehci_hcd_bcm63xx_drv_remove),
++ .shutdown = usb_hcd_platform_shutdown,
++ .driver = {
++ .name = "bcm63xx_ehci",
++ .owner = THIS_MODULE,
++ },
++};
++
++MODULE_ALIAS("platform:bcm63xx_ehci");
+--- a/drivers/usb/host/ehci-hcd.c
++++ b/drivers/usb/host/ehci-hcd.c
+@@ -1329,6 +1329,11 @@ MODULE_LICENSE ("GPL");
+ #define PLATFORM_DRIVER ehci_xls_driver
+ #endif
+
++#ifdef CONFIG_BCM63XX
++#include "ehci-bcm63xx.c"
++#define PLATFORM_DRIVER ehci_hcd_bcm63xx_driver
++#endif
++
+ #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
+ !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
+ !defined(XILINX_OF_PLATFORM_DRIVER)
--- /dev/null
+From a4d005c91d403d9f3d0272db6cc46202c06ec774 Mon Sep 17 00:00:00 2001
+From: Axel Gembe <ago@bastart.eu.org>
+Date: Mon, 12 May 2008 18:54:09 +0200
+Subject: [PATCH] bcm963xx: flashmap support
+
+Signed-off-by: Axel Gembe <ago@bastart.eu.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 19 +----------------
+ drivers/mtd/maps/bcm963xx-flash.c | 32 ++++++++++++++++++++++++----
+ drivers/mtd/redboot.c | 13 +++++++++--
+ 3 files changed, 38 insertions(+), 26 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -822,20 +822,6 @@ void __init board_setup(void)
+ panic("unexpected CPU for bcm963xx board");
+ }
+
+-static struct mtd_partition mtd_partitions[] = {
+- {
+- .name = "cfe",
+- .offset = 0x0,
+- .size = 0x40000,
+- }
+-};
+-
+-static struct physmap_flash_data flash_data = {
+- .width = 2,
+- .nr_parts = ARRAY_SIZE(mtd_partitions),
+- .parts = mtd_partitions,
+-};
+-
+ static struct resource mtd_resources[] = {
+ {
+ .start = 0, /* filled at runtime */
+@@ -845,12 +831,9 @@ static struct resource mtd_resources[] =
+ };
+
+ static struct platform_device mtd_dev = {
+- .name = "physmap-flash",
++ .name = "bcm963xx-flash",
+ .resource = mtd_resources,
+ .num_resources = ARRAY_SIZE(mtd_resources),
+- .dev = {
+- .platform_data = &flash_data,
+- },
+ };
+
+ static struct gpio_led_platform_data bcm63xx_led_data;
+--- a/drivers/mtd/maps/bcm963xx-flash.c
++++ b/drivers/mtd/maps/bcm963xx-flash.c
+@@ -28,6 +28,8 @@
+ #include <linux/vmalloc.h>
+ #include <linux/platform_device.h>
+ #include <linux/io.h>
++#include <linux/magic.h>
++#include <linux/jffs2.h>
+
+ #include <asm/mach-bcm63xx/bcm963xx_tag.h>
+
+@@ -36,6 +38,14 @@
+
+ #define PFX KBUILD_MODNAME ": "
+
++struct squashfs_super_block {
++ __le32 s_magic;
++ __le32 pad0[9];
++ __le64 bytes_used;
++};
++
++extern int parse_redboot_partitions(struct mtd_info *master, struct mtd_partition **pparts, unsigned long fis_origin);
++
+ static struct mtd_partition *parsed_parts;
+
+ static struct mtd_info *bcm963xx_mtd_info;
+@@ -220,9 +230,21 @@ probe_ok:
+ }
+ }
+ } else {
+- dev_info(&pdev->dev, "unsupported bootloader\n");
+- err = -ENODEV;
+- goto err_probe;
++ printk(KERN_INFO PFX "assuming RedBoot bootloader\n");
++ if (bcm963xx_mtd_info->size > 0x00400000) {
++ printk(KERN_INFO PFX "Support for extended flash memory size : 0x%lx ; ONLY 64MBIT SUPPORT\n", bcm963xx_mtd_info->size);
++ bcm963xx_map.virt = (u32)(BCM63XX_EXTENDED_SIZE);
++ }
++
++#ifdef CONFIG_MTD_REDBOOT_PARTS
++ if (parsed_nr_parts == 0) {
++ int ret = parse_redboot_partitions(bcm963xx_mtd_info, &parsed_parts, 0);
++ if (ret > 0) {
++ part_type = "RedBoot";
++ parsed_nr_parts = ret;
++ }
++ }
++#endif
+ }
+
+ return mtd_device_register(bcm963xx_mtd_info, parsed_parts,
+--- a/drivers/mtd/redboot.c
++++ b/drivers/mtd/redboot.c
+@@ -58,7 +58,7 @@ static inline int redboot_checksum(struc
+ return 1;
+ }
+
+-static int parse_redboot_partitions(struct mtd_info *master,
++int parse_redboot_partitions(struct mtd_info *master,
+ struct mtd_partition **pparts,
+ struct mtd_part_parser_data *data)
+ {
+@@ -75,6 +75,7 @@ static int parse_redboot_partitions(stru
+ int nulllen = 0;
+ int numslots;
+ unsigned long offset;
++ unsigned long fis_origin = 0;
+ #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
+ static char nullstring[] = "unallocated";
+ #endif
+@@ -181,6 +182,16 @@ static int parse_redboot_partitions(stru
+ goto out;
+ }
+
++ if (data && data->origin) {
++ fis_origin = data->origin;
++ } else {
++ for (i = 0; i < numslots; i++) {
++ if (!strncmp(buf[i].name, "RedBoot", 8)) {
++ fis_origin = (buf[i].flash_base & (master->size << 1) - 1);
++ }
++ }
++ }
++
+ for (i = 0; i < numslots; i++) {
+ struct fis_list *new_fl, **prev;
+
+@@ -201,10 +212,10 @@ static int parse_redboot_partitions(stru
+ goto out;
+ }
+ new_fl->img = &buf[i];
+- if (data && data->origin)
+- buf[i].flash_base -= data->origin;
+- else
+- buf[i].flash_base &= master->size-1;
++ if (fis_origin)
++ buf[i].flash_base -= fis_origin;
++
++ buf[i].flash_base &= (master->size << 1) - 1;
+
+ /* I'm sure the JFFS2 code has done me permanent damage.
+ * I now think the following is _normal_
--- /dev/null
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h
+@@ -86,8 +86,10 @@ struct bcm_tag {
+ char rootfs_crc[CRC_LEN];
+ /* 224-227: CRC32 of kernel partition */
+ char kernel_crc[CRC_LEN];
+- /* 228-235: Unused at present */
+- char reserved1[8];
++ /* 228-231: Image sequence number */
++ char image_sequence[4];
++ /* 222-235: Openwrt: real rootfs length */
++ char real_rootfs_length[4];
+ /* 236-239: CRC32 of header excluding last 20 bytes */
+ char header_crc[CRC_LEN];
+ /* 240-255: Unused at present */
+--- a/drivers/mtd/maps/bcm963xx-flash.c
++++ b/drivers/mtd/maps/bcm963xx-flash.c
+@@ -65,7 +65,7 @@ static int parse_cfe_partitions(struct m
+ int ret;
+ size_t retlen;
+ unsigned int rootfsaddr, kerneladdr, spareaddr;
+- unsigned int rootfslen, kernellen, sparelen, totallen;
++ unsigned int rootfslen, kernellen, sparelen;
+ int namelen = 0;
+ int i;
+ char *boardid;
+@@ -86,7 +86,7 @@ static int parse_cfe_partitions(struct m
+
+ sscanf(buf->kernel_address, "%u", &kerneladdr);
+ sscanf(buf->kernel_length, "%u", &kernellen);
+- sscanf(buf->total_length, "%u", &totallen);
++ rootfslen = *(uint32_t *)(&(buf->real_rootfs_length));
+ tagversion = &(buf->tag_version[0]);
+ boardid = &(buf->board_id[0]);
+
+@@ -95,7 +95,8 @@ static int parse_cfe_partitions(struct m
+
+ kerneladdr = kerneladdr - BCM63XX_EXTENDED_SIZE;
+ rootfsaddr = kerneladdr + kernellen;
+- spareaddr = roundup(totallen, master->erasesize) + master->erasesize;
++ rootfslen = roundup(rootfslen, master->erasesize);
++ spareaddr = rootfsaddr + rootfslen;
+ sparelen = master->size - spareaddr - master->erasesize;
+ rootfslen = spareaddr - rootfsaddr;
+
--- /dev/null
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -1515,7 +1515,7 @@ static int compute_hw_mtu(struct bcm_ene
+ actual_mtu = mtu;
+
+ /* add ethernet header + vlan tag size */
+- actual_mtu += VLAN_ETH_HLEN;
++ actual_mtu += VLAN_ETH_HLEN + VLAN_HLEN;
+
+ if (actual_mtu < 64 || actual_mtu > BCMENET_MAX_MTU)
+ return -EINVAL;
--- /dev/null
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -29,16 +29,15 @@
+ CKCTL_6338_SAR_EN | \
+ CKCTL_6338_SPI_EN)
+
+-#define CKCTL_6345_CPU_EN (1 << 0)
+-#define CKCTL_6345_BUS_EN (1 << 1)
+-#define CKCTL_6345_EBI_EN (1 << 2)
+-#define CKCTL_6345_UART_EN (1 << 3)
+-#define CKCTL_6345_ADSLPHY_EN (1 << 4)
+-#define CKCTL_6345_ENET_EN (1 << 7)
+-#define CKCTL_6345_USBH_EN (1 << 8)
++#define CKCTL_6345_CPU_EN (1 << 16)
++#define CKCTL_6345_BUS_EN (1 << 17)
++#define CKCTL_6345_EBI_EN (1 << 18)
++#define CKCTL_6345_UART_EN (1 << 19)
++#define CKCTL_6345_ADSLPHY_EN (1 << 20)
++#define CKCTL_6345_ENET_EN (1 << 23)
++#define CKCTL_6345_USBH_EN (1 << 24)
+
+-#define CKCTL_6345_ALL_SAFE_EN (CKCTL_6345_ENET_EN | \
+- CKCTL_6345_USBH_EN | \
++#define CKCTL_6345_ALL_SAFE_EN (CKCTL_6345_USBH_EN | \
+ CKCTL_6345_ADSLPHY_EN)
+
+ #define CKCTL_6348_ADSLPHY_EN (1 << 0)
+@@ -547,6 +546,39 @@
+ #define ENETDMA_SRAM4_REG(x) (0x20c + (x) * 0x10)
+
+
++/* Broadcom 6345 ENET DMA definitions */
++#define ENETDMA_6345_CHANCFG_REG(x) (0x00 + (x) * 0x40)
++#define ENETDMA_6345_CHANCFG_EN_SHIFT 0
++#define ENETDMA_6345_CHANCFG_EN_MASK (1 << ENETDMA_6345_CHANCFG_EN_SHIFT)
++#define ENETDMA_6345_PKTHALT_SHIFT 1
++#define ENETDMA_6345_PKTHALT_MASK (1 << ENETDMA_6345_PKTHALT_SHIFT)
++#define ENETDMA_6345_CHAINING_SHIFT 2
++#define ENETDMA_6345_CHAINING_MASK (1 << ENETDMA_6345_CHAINING_SHIFT)
++#define ENETDMA_6345_WRAP_EN_SHIFT 3
++#define ENETDMA_6345_WRAP_EN_MASK (1 << ENETDMA_6345_WRAP_EN_SHIFT)
++#define ENETDMA_6345_FLOWC_EN_SHIFT 4
++#define ENETDMA_6345_FLOWC_EN_MASK (1 << ENETDMA_6345_FLOWC_EN_SHIFT)
++
++#define ENETDMA_6345_MAXBURST_REG(x) (0x04 + (x) * 0x40)
++
++#define ENETDMA_6345_RSTART_REG(x) (0x08 + (x) * 0x40)
++
++#define ENETDMA_6345_LEN_REG(x) (0x0C + (x) * 0x40)
++
++#define ENETDMA_6345_BSTAT_REG(x) (0x10 + (x) * 0x40)
++
++#define ENETDMA_6345_IR_REG(x) (0x14 + (x) * 0x40)
++#define ENETDMA_6345_IR_BUFDONE_MASK (1 << 0)
++#define ENETDMA_6345_IR_PKTDONE_MASK (1 << 1)
++#define ENETDMA_6345_IR_NOTOWNER_MASK (1 << 2)
++
++#define ENETDMA_6345_IRMASK_REG(x) (0x18 + (x) * 0x40)
++
++#define ENETDMA_6345_FC_REG(x) (0x1C + (x) * 0x40)
++
++#define ENETDMA_6345_BUFALLOC_REG(x) (0x20 + (x) * 0x40)
++
++
+ /*************************************************************************
+ * _REG relative to RSET_OHCI_PRIV
+ *************************************************************************/
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -32,6 +32,7 @@
+ #include <linux/if_vlan.h>
+
+ #include <bcm63xx_dev_enet.h>
++#include <bcm63xx_cpu.h>
+ #include "bcm63xx_enet.h"
+
+ static char bcm_enet_driver_name[] = "bcm63xx_enet";
+@@ -178,6 +179,7 @@ static void bcm_enet_mdio_write_mii(stru
+ static int bcm_enet_refill_rx(struct net_device *dev)
+ {
+ struct bcm_enet_priv *priv;
++ unsigned int desc_shift = BCMCPU_IS_6345() ? DMADESC_6345_SHIFT : 0;
+
+ priv = netdev_priv(dev);
+
+@@ -206,7 +208,7 @@ static int bcm_enet_refill_rx(struct net
+ len_stat = priv->rx_skb_size << DMADESC_LENGTH_SHIFT;
+ len_stat |= DMADESC_OWNER_MASK;
+ if (priv->rx_dirty_desc == priv->rx_ring_size - 1) {
+- len_stat |= DMADESC_WRAP_MASK;
++ len_stat |= (DMADESC_WRAP_MASK >> desc_shift);
+ priv->rx_dirty_desc = 0;
+ } else {
+ priv->rx_dirty_desc++;
+@@ -217,7 +219,10 @@ static int bcm_enet_refill_rx(struct net
+ priv->rx_desc_count++;
+
+ /* tell dma engine we allocated one buffer */
+- enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan));
++ if (!BCMCPU_IS_6345())
++ enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan));
++ else
++ enet_dma_writel(priv, 1, ENETDMA_6345_BUFALLOC_REG(priv->rx_chan));
+ }
+
+ /* If rx ring is still empty, set a timer to try allocating
+@@ -255,6 +260,7 @@ static int bcm_enet_receive_queue(struct
+ struct bcm_enet_priv *priv;
+ struct device *kdev;
+ int processed;
++ unsigned int desc_shift = BCMCPU_IS_6345() ? DMADESC_6345_SHIFT : 0;
+
+ priv = netdev_priv(dev);
+ kdev = &priv->pdev->dev;
+@@ -293,7 +299,7 @@ static int bcm_enet_receive_queue(struct
+
+ /* if the packet does not have start of packet _and_
+ * end of packet flag set, then just recycle it */
+- if ((len_stat & DMADESC_ESOP_MASK) != DMADESC_ESOP_MASK) {
++ if ((len_stat & (DMADESC_ESOP_MASK >> desc_shift)) != (DMADESC_ESOP_MASK >> desc_shift)) {
+ dev->stats.rx_dropped++;
+ continue;
+ }
+@@ -353,8 +359,15 @@ static int bcm_enet_receive_queue(struct
+ bcm_enet_refill_rx(dev);
+
+ /* kick rx dma */
+- enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
+- ENETDMA_CHANCFG_REG(priv->rx_chan));
++ if (!BCMCPU_IS_6345())
++ enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
++ ENETDMA_CHANCFG_REG(priv->rx_chan));
++ else
++ enet_dma_writel(priv, ENETDMA_6345_CHANCFG_EN_MASK |
++ ENETDMA_6345_CHAINING_MASK |
++ ENETDMA_6345_WRAP_EN_MASK |
++ ENETDMA_6345_FLOWC_EN_MASK,
++ ENETDMA_6345_CHANCFG_REG(priv->rx_chan));
+ }
+
+ return processed;
+@@ -429,10 +442,21 @@ static int bcm_enet_poll(struct napi_str
+ dev = priv->net_dev;
+
+ /* ack interrupts */
+- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
+- ENETDMA_IR_REG(priv->rx_chan));
+- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
+- ENETDMA_IR_REG(priv->tx_chan));
++ if (!BCMCPU_IS_6345()) {
++ enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
++ ENETDMA_IR_REG(priv->rx_chan));
++ enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
++ ENETDMA_IR_REG(priv->tx_chan));
++ } else {
++ enet_dma_writel(priv, ENETDMA_IR_BUFDONE_MASK |
++ ENETDMA_IR_PKTDONE_MASK |
++ ENETDMA_IR_NOTOWNER_MASK,
++ ENETDMA_6345_IR_REG(priv->rx_chan));
++ enet_dma_writel(priv, ENETDMA_IR_BUFDONE_MASK |
++ ENETDMA_IR_PKTDONE_MASK |
++ ENETDMA_IR_NOTOWNER_MASK,
++ ENETDMA_6345_IR_REG(priv->tx_chan));
++ }
+
+ /* reclaim sent skb */
+ tx_work_done = bcm_enet_tx_reclaim(dev, 0);
+@@ -451,10 +475,21 @@ static int bcm_enet_poll(struct napi_str
+ napi_complete(napi);
+
+ /* restore rx/tx interrupt */
+- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
+- ENETDMA_IRMASK_REG(priv->rx_chan));
+- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
+- ENETDMA_IRMASK_REG(priv->tx_chan));
++ if (!BCMCPU_IS_6345()) {
++ enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
++ ENETDMA_IRMASK_REG(priv->rx_chan));
++ enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
++ ENETDMA_IRMASK_REG(priv->tx_chan));
++ } else {
++ enet_dma_writel(priv, ENETDMA_IR_BUFDONE_MASK |
++ ENETDMA_IR_PKTDONE_MASK |
++ ENETDMA_IR_NOTOWNER_MASK,
++ ENETDMA_6345_IRMASK_REG(priv->rx_chan));
++ enet_dma_writel(priv, ENETDMA_IR_BUFDONE_MASK |
++ ENETDMA_IR_PKTDONE_MASK |
++ ENETDMA_IR_NOTOWNER_MASK,
++ ENETDMA_6345_IRMASK_REG(priv->tx_chan));
++ }
+
+ return rx_work_done;
+ }
+@@ -497,8 +532,13 @@ static irqreturn_t bcm_enet_isr_dma(int
+ priv = netdev_priv(dev);
+
+ /* mask rx/tx interrupts */
+- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
+- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
++ if (!BCMCPU_IS_6345()) {
++ enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
++ enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
++ } else {
++ enet_dma_writel(priv, 0, ENETDMA_6345_IRMASK_REG(priv->rx_chan));
++ enet_dma_writel(priv, 0, ENETDMA_6345_IRMASK_REG(priv->tx_chan));
++ }
+
+ napi_schedule(&priv->napi);
+
+@@ -514,6 +554,7 @@ static int bcm_enet_start_xmit(struct sk
+ struct bcm_enet_desc *desc;
+ u32 len_stat;
+ int ret;
++ unsigned int desc_shift = BCMCPU_IS_6345() ? DMADESC_6345_SHIFT : 0;
+
+ priv = netdev_priv(dev);
+
+@@ -539,14 +580,13 @@ static int bcm_enet_start_xmit(struct sk
+ DMA_TO_DEVICE);
+
+ len_stat = (skb->len << DMADESC_LENGTH_SHIFT) & DMADESC_LENGTH_MASK;
+- len_stat |= DMADESC_ESOP_MASK |
+- DMADESC_APPEND_CRC |
+- DMADESC_OWNER_MASK;
++ len_stat |= ((DMADESC_ESOP_MASK >> desc_shift) |
++ DMADESC_APPEND_CRC | DMADESC_OWNER_MASK);
+
+ priv->tx_curr_desc++;
+ if (priv->tx_curr_desc == priv->tx_ring_size) {
+ priv->tx_curr_desc = 0;
+- len_stat |= DMADESC_WRAP_MASK;
++ len_stat |= (DMADESC_WRAP_MASK >> desc_shift);
+ }
+ priv->tx_desc_count--;
+
+@@ -557,8 +597,15 @@ static int bcm_enet_start_xmit(struct sk
+ wmb();
+
+ /* kick tx dma */
+- enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
+- ENETDMA_CHANCFG_REG(priv->tx_chan));
++ if (!BCMCPU_IS_6345())
++ enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
++ ENETDMA_CHANCFG_REG(priv->tx_chan));
++ else
++ enet_dma_writel(priv, ENETDMA_6345_CHANCFG_EN_MASK |
++ ENETDMA_6345_CHAINING_MASK |
++ ENETDMA_6345_WRAP_EN_MASK |
++ ENETDMA_6345_FLOWC_EN_MASK,
++ ENETDMA_6345_CHANCFG_REG(priv->tx_chan));
+
+ /* stop queue if no more desc available */
+ if (!priv->tx_desc_count)
+@@ -686,6 +733,9 @@ static void bcm_enet_set_flow(struct bcm
+ val &= ~ENET_RXCFG_ENFLOW_MASK;
+ enet_writel(priv, val, ENET_RXCFG_REG);
+
++ if (BCMCPU_IS_6345())
++ return;
++
+ /* tx flow control (pause frame generation) */
+ val = enet_dma_readl(priv, ENETDMA_CFG_REG);
+ if (tx_en)
+@@ -833,8 +883,13 @@ static int bcm_enet_open(struct net_devi
+
+ /* mask all interrupts and request them */
+ enet_writel(priv, 0, ENET_IRMASK_REG);
+- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
+- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
++ if (!BCMCPU_IS_6345()) {
++ enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
++ enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
++ } else {
++ enet_dma_writel(priv, 0, ENETDMA_6345_IRMASK_REG(priv->rx_chan));
++ enet_dma_writel(priv, 0, ENETDMA_6345_IRMASK_REG(priv->tx_chan));
++ }
+
+ ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev);
+ if (ret)
+@@ -913,8 +968,12 @@ static int bcm_enet_open(struct net_devi
+ priv->rx_curr_desc = 0;
+
+ /* initialize flow control buffer allocation */
+- enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
+- ENETDMA_BUFALLOC_REG(priv->rx_chan));
++ if (!BCMCPU_IS_6345())
++ enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
++ ENETDMA_BUFALLOC_REG(priv->rx_chan));
++ else
++ enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
++ ENETDMA_6345_BUFALLOC_REG(priv->rx_chan));
+
+ if (bcm_enet_refill_rx(dev)) {
+ dev_err(kdev, "cannot allocate rx skb queue\n");
+@@ -923,37 +982,62 @@ static int bcm_enet_open(struct net_devi
+ }
+
+ /* write rx & tx ring addresses */
+- enet_dma_writel(priv, priv->rx_desc_dma,
+- ENETDMA_RSTART_REG(priv->rx_chan));
+- enet_dma_writel(priv, priv->tx_desc_dma,
+- ENETDMA_RSTART_REG(priv->tx_chan));
++ if (!BCMCPU_IS_6345()) {
++ enet_dma_writel(priv, priv->rx_desc_dma,
++ ENETDMA_RSTART_REG(priv->rx_chan));
++ enet_dma_writel(priv, priv->tx_desc_dma,
++ ENETDMA_RSTART_REG(priv->tx_chan));
++ } else {
++ enet_dma_writel(priv, priv->rx_desc_dma,
++ ENETDMA_6345_RSTART_REG(priv->rx_chan));
++ enet_dma_writel(priv, priv->tx_desc_dma,
++ ENETDMA_6345_RSTART_REG(priv->tx_chan));
++ }
+
+ /* clear remaining state ram for rx & tx channel */
+- enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->rx_chan));
+- enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->tx_chan));
+- enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->rx_chan));
+- enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->tx_chan));
+- enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->rx_chan));
+- enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->tx_chan));
++ if (!BCMCPU_IS_6345()) {
++ enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->rx_chan));
++ enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->tx_chan));
++ enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->rx_chan));
++ enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->tx_chan));
++ enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->rx_chan));
++ enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->tx_chan));
++ } else {
++ enet_dma_writel(priv, 0, ENETDMA_6345_FC_REG(priv->rx_chan));
++ enet_dma_writel(priv, 0, ENETDMA_6345_FC_REG(priv->tx_chan));
++ }
+
+ /* set max rx/tx length */
+ enet_writel(priv, priv->hw_mtu, ENET_RXMAXLEN_REG);
+ enet_writel(priv, priv->hw_mtu, ENET_TXMAXLEN_REG);
+
+ /* set dma maximum burst len */
+- enet_dma_writel(priv, BCMENET_DMA_MAXBURST,
+- ENETDMA_MAXBURST_REG(priv->rx_chan));
+- enet_dma_writel(priv, BCMENET_DMA_MAXBURST,
+- ENETDMA_MAXBURST_REG(priv->tx_chan));
++ if (!BCMCPU_IS_6345()) {
++ enet_dma_writel(priv, BCMENET_DMA_MAXBURST,
++ ENETDMA_MAXBURST_REG(priv->rx_chan));
++ enet_dma_writel(priv, BCMENET_DMA_MAXBURST,
++ ENETDMA_MAXBURST_REG(priv->tx_chan));
++ } else {
++ enet_dma_writel(priv, BCMENET_DMA_MAXBURST,
++ ENETDMA_6345_MAXBURST_REG(priv->rx_chan));
++ enet_dma_writel(priv, BCMENET_DMA_MAXBURST,
++ ENETDMA_6345_MAXBURST_REG(priv->tx_chan));
++ }
+
+ /* set correct transmit fifo watermark */
+ enet_writel(priv, BCMENET_TX_FIFO_TRESH, ENET_TXWMARK_REG);
+
+ /* set flow control low/high threshold to 1/3 / 2/3 */
+- val = priv->rx_ring_size / 3;
+- enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan));
+- val = (priv->rx_ring_size * 2) / 3;
+- enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan));
++ if (!BCMCPU_IS_6345()) {
++ val = priv->rx_ring_size / 3;
++ enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan));
++ val = (priv->rx_ring_size * 2) / 3;
++ enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan));
++ } else {
++ enet_dma_writel(priv, 5, ENETDMA_6345_FC_REG(priv->rx_chan));
++ enet_dma_writel(priv, priv->rx_ring_size, ENETDMA_6345_LEN_REG(priv->rx_chan));
++ enet_dma_writel(priv, priv->tx_ring_size, ENETDMA_6345_LEN_REG(priv->tx_chan));
++ }
+
+ /* all set, enable mac and interrupts, start dma engine and
+ * kick rx dma channel */
+@@ -961,27 +1045,58 @@ static int bcm_enet_open(struct net_devi
+ val = enet_readl(priv, ENET_CTL_REG);
+ val |= ENET_CTL_ENABLE_MASK;
+ enet_writel(priv, val, ENET_CTL_REG);
+- enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
+- enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
+- ENETDMA_CHANCFG_REG(priv->rx_chan));
++
++ if (!BCMCPU_IS_6345()) {
++ enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
++ enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
++ ENETDMA_CHANCFG_REG(priv->rx_chan));
++ } else {
++ enet_dma_writel(priv, ENETDMA_6345_CHANCFG_EN_MASK |
++ ENETDMA_6345_CHAINING_MASK |
++ ENETDMA_6345_WRAP_EN_MASK |
++ ENETDMA_6345_FLOWC_EN_MASK,
++ ENETDMA_6345_CHANCFG_REG(priv->rx_chan));
++ }
+
+ /* watch "mib counters about to overflow" interrupt */
+ enet_writel(priv, ENET_IR_MIB, ENET_IR_REG);
+ enet_writel(priv, ENET_IR_MIB, ENET_IRMASK_REG);
+
+ /* watch "packet transferred" interrupt in rx and tx */
+- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
+- ENETDMA_IR_REG(priv->rx_chan));
+- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
+- ENETDMA_IR_REG(priv->tx_chan));
++ if (!BCMCPU_IS_6345()) {
++ enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
++ ENETDMA_IR_REG(priv->rx_chan));
++ enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
++ ENETDMA_IR_REG(priv->tx_chan));
++ } else {
++ enet_dma_writel(priv, ENETDMA_IR_BUFDONE_MASK |
++ ENETDMA_IR_PKTDONE_MASK |
++ ENETDMA_IR_NOTOWNER_MASK,
++ ENETDMA_6345_IR_REG(priv->rx_chan));
++ enet_dma_writel(priv, ENETDMA_IR_BUFDONE_MASK |
++ ENETDMA_IR_PKTDONE_MASK |
++ ENETDMA_IR_NOTOWNER_MASK,
++ ENETDMA_6345_IR_REG(priv->tx_chan));
++ }
+
+ /* make sure we enable napi before rx interrupt */
+ napi_enable(&priv->napi);
+
+- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
+- ENETDMA_IRMASK_REG(priv->rx_chan));
+- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
+- ENETDMA_IRMASK_REG(priv->tx_chan));
++ if (!BCMCPU_IS_6345()) {
++ enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
++ ENETDMA_IRMASK_REG(priv->rx_chan));
++ enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
++ ENETDMA_IRMASK_REG(priv->tx_chan));
++ } else {
++ enet_dma_writel(priv, ENETDMA_IR_BUFDONE_MASK |
++ ENETDMA_IR_PKTDONE_MASK |
++ ENETDMA_IR_NOTOWNER_MASK,
++ ENETDMA_6345_IRMASK_REG(priv->rx_chan));
++ enet_dma_writel(priv, ENETDMA_IR_BUFDONE_MASK |
++ ENETDMA_IR_PKTDONE_MASK |
++ ENETDMA_IR_NOTOWNER_MASK,
++ ENETDMA_6345_IRMASK_REG(priv->tx_chan));
++ }
+
+ if (priv->has_phy)
+ phy_start(priv->phydev);
+@@ -1061,13 +1176,19 @@ static void bcm_enet_disable_dma(struct
+ {
+ int limit;
+
+- enet_dma_writel(priv, 0, ENETDMA_CHANCFG_REG(chan));
++ if (!BCMCPU_IS_6345())
++ enet_dma_writel(priv, 0, ENETDMA_CHANCFG_REG(chan));
++ else
++ enet_dma_writel(priv, 0, ENETDMA_6345_CHANCFG_REG(chan));
+
+ limit = 1000;
+ do {
+ u32 val;
+
+- val = enet_dma_readl(priv, ENETDMA_CHANCFG_REG(chan));
++ if (!BCMCPU_IS_6345())
++ val = enet_dma_readl(priv, ENETDMA_CHANCFG_REG(chan));
++ else
++ val = enet_dma_readl(priv, ENETDMA_6345_CHANCFG_REG(chan));
+ if (!(val & ENETDMA_CHANCFG_EN_MASK))
+ break;
+ udelay(1);
+@@ -1094,8 +1215,13 @@ static int bcm_enet_stop(struct net_devi
+
+ /* mask all interrupts */
+ enet_writel(priv, 0, ENET_IRMASK_REG);
+- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
+- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
++ if (!BCMCPU_IS_6345()) {
++ enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
++ enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
++ } else {
++ enet_dma_writel(priv, 0, ENETDMA_6345_IRMASK_REG(priv->rx_chan));
++ enet_dma_writel(priv, 0, ENETDMA_6345_IRMASK_REG(priv->tx_chan));
++ }
+
+ /* make sure no mib update is scheduled */
+ cancel_work_sync(&priv->mib_update_task);
+@@ -1622,6 +1748,7 @@ static int __devinit bcm_enet_probe(stru
+ const char *clk_name;
+ unsigned int iomem_size;
+ int i, ret;
++ unsigned int chan_offset = 0;
+
+ /* stop if shared driver failed, assume driver->probe will be
+ * called in the same order we register devices (correct ?) */
+@@ -1661,10 +1788,13 @@ static int __devinit bcm_enet_probe(stru
+ priv->irq_tx = res_irq_tx->start;
+ priv->mac_id = pdev->id;
+
++ if (BCMCPU_IS_6345())
++ chan_offset = 1;
++
+ /* get rx & tx dma channel id for this mac */
+ if (priv->mac_id == 0) {
+- priv->rx_chan = 0;
+- priv->tx_chan = 1;
++ priv->rx_chan = 0 + chan_offset;
++ priv->tx_chan = 1 + chan_offset;
+ clk_name = "enet0";
+ } else {
+ priv->rx_chan = 2;
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
+@@ -46,6 +46,9 @@ struct bcm_enet_desc {
+ #define DMADESC_ESOP_MASK (DMADESC_EOP_MASK | DMADESC_SOP_MASK)
+ #define DMADESC_WRAP_MASK (1 << 12)
+
++/* Shift down for EOP, SOP and WRAP bits */
++#define DMADESC_6345_SHIFT (3)
++
+ #define DMADESC_UNDER_MASK (1 << 9)
+ #define DMADESC_APPEND_CRC (1 << 8)
+ #define DMADESC_OVSIZE_MASK (1 << 4)
+--- a/arch/mips/bcm63xx/dev-enet.c
++++ b/arch/mips/bcm63xx/dev-enet.c
+@@ -104,7 +104,7 @@ int __init bcm63xx_enet_register(int uni
+ if (unit > 1)
+ return -ENODEV;
+
+- if (unit == 1 && BCMCPU_IS_6338())
++ if (unit == 1 && (BCMCPU_IS_6338() || BCMCPU_IS_6345()))
+ return -ENODEV;
+
+ if (!shared_device_registered) {
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -15,6 +15,8 @@
+ #include <linux/mtd/partitions.h>
+ #include <linux/mtd/physmap.h>
+ #include <linux/ssb/ssb.h>
++#include <linux/gpio_buttons.h>
++#include <linux/input.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+@@ -296,6 +298,16 @@ static struct board_info __initdata boar
+ .active_low = 1,
+ },
+ },
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 33,
++ .active_low = 1,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ },
+ };
+
+ static struct board_info __initdata board_96348gw = {
+@@ -354,6 +366,16 @@ static struct board_info __initdata boar
+ .active_low = 1,
+ },
+ },
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 36,
++ .active_low = 1,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ },
+ };
+
+ static struct board_info __initdata board_FAST2404 = {
+@@ -844,12 +866,23 @@ static struct platform_device bcm63xx_gp
+ .dev.platform_data = &bcm63xx_led_data,
+ };
+
++static struct gpio_buttons_platform_data bcm63xx_gpio_buttons_data = {
++ .poll_interval = 20,
++};
++
++static struct platform_device bcm63xx_gpio_buttons_device = {
++ .name = "gpio-buttons",
++ .id = 0,
++ .dev.platform_data = &bcm63xx_gpio_buttons_data,
++};
++
+ /*
+ * third stage init callback, register all board devices.
+ */
+ int __init board_register_devices(void)
+ {
+ u32 val;
++ int button_count = 0;
+
+ if (board.has_uart0)
+ bcm63xx_uart_register(0);
+@@ -891,5 +924,16 @@ int __init board_register_devices(void)
+
+ platform_device_register(&bcm63xx_gpio_leds);
+
++ /* count number of BUTTONs defined by this device */
++ while (button_count < ARRAY_SIZE(board.buttons) && board.buttons[button_count].desc)
++ button_count++;
++
++ if (button_count) {
++ bcm63xx_gpio_buttons_data.nbuttons = button_count;
++ bcm63xx_gpio_buttons_data.buttons = board.buttons;
++
++ platform_device_register(&bcm63xx_gpio_buttons_device);
++ }
++
+ return 0;
+ }
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -57,6 +57,9 @@ struct board_info {
+
+ /* GPIO LEDs */
+ struct gpio_led leds[5];
++
++ /* Buttons */
++ struct gpio_button buttons[2];
+ };
+
+ #endif /* ! BOARD_BCM963XX_H_ */
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -883,6 +883,7 @@ int __init board_register_devices(void)
+ {
+ u32 val;
+ int button_count = 0;
++ int led_count = 0;
+
+ if (board.has_uart0)
+ bcm63xx_uart_register(0);
+@@ -919,7 +920,11 @@ int __init board_register_devices(void)
+
+ platform_device_register(&mtd_dev);
+
+- bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
++ /* count number of LEDs defined by this device */
++ while (led_count < ARRAY_SIZE(board.leds) && board.leds[led_count].name)
++ led_count++;
++
++ bcm63xx_led_data.num_leds = led_count;
+ bcm63xx_led_data.leds = board.leds;
+
+ platform_device_register(&bcm63xx_gpio_leds);
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -29,6 +29,7 @@
+ #include <bcm63xx_dev_pcmcia.h>
+ #include <bcm63xx_dev_usb_ohci.h>
+ #include <bcm63xx_dev_usb_ehci.h>
++#include <bcm63xx_dev_usb_udc.h>
+ #include <board_bcm963xx.h>
+
+ #define PFX "board_bcm963xx: "
+@@ -400,6 +401,8 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ .has_pccard = 1,
+ .has_ehci0 = 1,
++
++ .has_udc0 = 1,
+ };
+
+ static struct board_info __initdata board_rta1025w_16 = {
+@@ -911,6 +914,9 @@ int __init board_register_devices(void)
+ if (board.has_dsp)
+ bcm63xx_dsp_register(&board.dsp);
+
++ if (board.has_udc0)
++ bcm63xx_udc_register();
++
+ /* read base address of boot chip select (0) */
+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+ val &= MPI_CSBASE_BASE_MASK;
+--- /dev/null
++++ b/arch/mips/bcm63xx/dev-usb-udc.c
+@@ -0,0 +1,58 @@
++/*
++ * Copyright (C) 2009 Henk Vergonet <Henk.Vergonet@gmail.com>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
++ */
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <bcm63xx_cpu.h>
++
++static struct resource udc_resources[] = {
++ {
++ .start = -1, /* filled at runtime */
++ .end = -1, /* filled at runtime */
++ .flags = IORESOURCE_MEM,
++ },
++ {
++ .start = -1, /* filled at runtime */
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++static u64 udc_dmamask = ~(u32)0;
++
++static struct platform_device bcm63xx_udc_device = {
++ .name = "bcm63xx-udc",
++ .id = 0,
++ .num_resources = ARRAY_SIZE(udc_resources),
++ .resource = udc_resources,
++ .dev = {
++ .dma_mask = &udc_dmamask,
++ .coherent_dma_mask = 0xffffffff,
++ },
++};
++
++int __init bcm63xx_udc_register(void)
++{
++ if (!BCMCPU_IS_6338() && !BCMCPU_IS_6345() && !BCMCPU_IS_6348())
++ return 0;
++
++ udc_resources[0].start = bcm63xx_regset_address(RSET_UDC0);
++ udc_resources[0].end = udc_resources[0].start;
++ udc_resources[0].end += RSET_UDC_SIZE - 1;
++ udc_resources[1].start = bcm63xx_get_irq_number(IRQ_UDC0);
++ return platform_device_register(&bcm63xx_udc_device);
++}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -127,7 +127,7 @@ enum bcm63xx_regs_set {
+ #define BCM_6338_UART1_BASE (0xdeadbeef)
+ #define BCM_6338_GPIO_BASE (0xfffe0400)
+ #define BCM_6338_SPI_BASE (0xfffe0c00)
+-#define BCM_6338_UDC0_BASE (0xdeadbeef)
++#define BCM_6338_UDC0_BASE (0xfffe3000)
+ #define BCM_6338_USBDMA_BASE (0xfffe2400)
+ #define BCM_6338_OHCI0_BASE (0xdeadbeef)
+ #define BCM_6338_OHCI_PRIV_BASE (0xfffe3000)
+@@ -158,7 +158,7 @@ enum bcm63xx_regs_set {
+ #define BCM_6345_UART1_BASE (0xdeadbeef)
+ #define BCM_6345_GPIO_BASE (0xfffe0400)
+ #define BCM_6345_SPI_BASE (0xdeadbeef)
+-#define BCM_6345_UDC0_BASE (0xdeadbeef)
++#define BCM_6345_UDC0_BASE (0xfffe2100)
+ #define BCM_6345_USBDMA_BASE (0xfffe2800)
+ #define BCM_6345_ENET0_BASE (0xfffe1800)
+ #define BCM_6345_ENETDMA_BASE (0xfffe2800)
+@@ -215,7 +215,7 @@ enum bcm63xx_regs_set {
+ #define BCM_6358_UART1_BASE (0xfffe0120)
+ #define BCM_6358_GPIO_BASE (0xfffe0080)
+ #define BCM_6358_SPI_BASE (0xdeadbeef)
+-#define BCM_6358_UDC0_BASE (0xfffe0800)
++#define BCM_6358_UDC0_BASE (0xfffe0400)
+ #define BCM_6358_OHCI0_BASE (0xfffe1400)
+ #define BCM_6358_OHCI_PRIV_BASE (0xdeadbeef)
+ #define BCM_6358_USBH_PRIV_BASE (0xfffe1500)
+@@ -444,6 +444,7 @@ enum bcm63xx_irq {
+ IRQ_UART0,
+ IRQ_UART1,
+ IRQ_DSL,
++ IRQ_UDC0,
+ IRQ_ENET0,
+ IRQ_ENET1,
+ IRQ_ENET_PHY,
+@@ -486,7 +487,7 @@ enum bcm63xx_irq {
+ #define BCM_6345_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
+ #define BCM_6345_DSL_IRQ (IRQ_INTERNAL_BASE + 3)
+ #define BCM_6345_ATM_IRQ (IRQ_INTERNAL_BASE + 4)
+-#define BCM_6345_USB_IRQ (IRQ_INTERNAL_BASE + 5)
++#define BCM_6345_UDC0_IRQ (IRQ_INTERNAL_BASE + 5)
+ #define BCM_6345_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
+ #define BCM_6345_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12)
+ #define BCM_6345_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 13 + 1)
+@@ -508,10 +509,17 @@ enum bcm63xx_irq {
+ #define BCM_6348_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
+ #define BCM_6348_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
+ #define BCM_6348_DSL_IRQ (IRQ_INTERNAL_BASE + 4)
++#define BCM_6348_UDC0_IRQ (IRQ_INTERNAL_BASE + 6)
+ #define BCM_6348_ENET1_IRQ (IRQ_INTERNAL_BASE + 7)
+ #define BCM_6348_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
+ #define BCM_6348_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
+ #define BCM_6348_OHCI0_IRQ (IRQ_INTERNAL_BASE + 12)
++#define BCM_6348_USB_CNTL_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 14)
++#define BCM_6348_USB_CNTL_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 15)
++#define BCM_6348_USB_BULK_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 16)
++#define BCM_6348_USB_BULK_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 17)
++#define BCM_6348_USB_ISO_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 18)
++#define BCM_6348_USB_ISO_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 19)
+ #define BCM_6348_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 20)
+ #define BCM_6348_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 21)
+ #define BCM_6348_ENET1_RXDMA_IRQ (IRQ_INTERNAL_BASE + 22)
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_udc.h
+@@ -0,0 +1,6 @@
++#ifndef BCM63XX_DEV_USB_UDC_H_
++#define BCM63XX_DEV_USB_UDC_H_
++
++int bcm63xx_udc_register(void);
++
++#endif /* BCM63XX_DEV_USB_UDC_H_ */
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -47,6 +47,7 @@ struct board_info {
+ unsigned int has_dsp:1;
+ unsigned int has_uart0:1;
+ unsigned int has_uart1:1;
++ unsigned int has_udc0:1;
+
+ /* ethernet config */
+ struct bcm63xx_enet_platform_data enet0;
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -1,6 +1,6 @@
+ obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \
+ dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o \
+- dev-usb-ohci.o dev-usb-ehci.o
++ dev-usb-ohci.o dev-usb-ehci.o dev-usb-udc.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
+ obj-y += boards/
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -141,6 +141,30 @@ static struct clk clk_usbh = {
+ };
+
+ /*
++ * USB slave clock
++ */
++static void usbs_set(struct clk *clk, int enable)
++{
++ u32 mask;
++
++ switch(bcm63xx_get_cpu_id()) {
++ case BCM6338_CPU_ID:
++ mask = CKCTL_6338_USBS_EN;
++ break;
++ case BCM6348_CPU_ID:
++ mask = CKCTL_6348_USBS_EN;
++ break;
++ default:
++ return;
++ }
++ bcm_hwclock_set(mask, enable);
++}
++
++static struct clk clk_usbs = {
++ .set = usbs_set,
++};
++
++/*
+ * SPI clock
+ */
+ static void spi_set(struct clk *clk, int enable)
+@@ -208,6 +232,8 @@ struct clk *clk_get(struct device *dev,
+ return &clk_ephy;
+ if (!strcmp(id, "usbh"))
+ return &clk_usbh;
++ if (!strcmp(id, "usbs"))
++ return &clk_usbs;
+ if (!strcmp(id, "spi"))
+ return &clk_spi;
+ if (!strcmp(id, "periph"))
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -7,6 +7,7 @@ config BCM63XX_CPU_6338
+ select USB_ARCH_HAS_OHCI
+ select USB_OHCI_BIG_ENDIAN_DESC
+ select USB_OHCI_BIG_ENDIAN_MMIO
++ select USB_ARCH_HAS_UDC
+
+ config BCM63XX_CPU_6345
+ bool "support 6345 CPU"
+@@ -19,6 +20,7 @@ config BCM63XX_CPU_6348
+ select USB_ARCH_HAS_OHCI
+ select USB_OHCI_BIG_ENDIAN_DESC
+ select USB_OHCI_BIG_ENDIAN_MMIO
++ select USB_ARCH_HAS_UDC
+
+ config BCM63XX_CPU_6358
+ bool "support 6358 CPU"
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -917,6 +917,9 @@ int __init board_register_devices(void)
+ if (board.has_udc0)
+ bcm63xx_udc_register();
+
++ if (board.num_devs)
++ platform_add_devices(board.devs, board.num_devs);
++
+ /* read base address of boot chip select (0) */
+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+ val &= MPI_CSBASE_BASE_MASK;
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -61,6 +61,10 @@ struct board_info {
+
+ /* Buttons */
+ struct gpio_button buttons[2];
++
++ /* Additional platform devices */
++ struct platform_device **devs;
++ unsigned int num_devs;
+ };
+
+ #endif /* ! BOARD_BCM963XX_H_ */
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -920,6 +920,9 @@ int __init board_register_devices(void)
+ if (board.num_devs)
+ platform_add_devices(board.devs, board.num_devs);
+
++ if (board.num_spis)
++ spi_register_board_info(board.spis, board.num_spis);
++
+ /* read base address of boot chip select (0) */
+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+ val &= MPI_CSBASE_BASE_MASK;
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -65,6 +65,10 @@ struct board_info {
+ /* Additional platform devices */
+ struct platform_device **devs;
+ unsigned int num_devs;
++
++ /* Additional platform devices */
++ struct spi_board_info *spis;
++ unsigned int num_spis;
+ };
+
+ #endif /* ! BOARD_BCM963XX_H_ */
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -17,6 +17,7 @@
+ #include <linux/ssb/ssb.h>
+ #include <linux/gpio_buttons.h>
+ #include <linux/input.h>
++#include <linux/export.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+@@ -39,6 +40,13 @@ static unsigned int mac_addr_used;
+ static struct board_info board;
+
+ /*
++ * Required export for WL
++ */
++#define NVRAM_SPACE 0x8000
++char nvram_buf[NVRAM_SPACE];
++EXPORT_SYMBOL(nvram_buf);
++
++/*
+ * known 6338 boards
+ */
+ #ifdef CONFIG_BCM63XX_CPU_6338
+@@ -752,6 +760,7 @@ void __init board_prom_init(void)
+
+ /* extract nvram data */
+ memcpy(&nvram, boot_addr + BCM963XX_NVRAM_OFFSET, sizeof(nvram));
++ memcpy(&nvram_buf, boot_addr + BCM963XX_NVRAM_OFFSET, NVRAM_SPACE);
+
+ /* check checksum before using data */
+ if (nvram.version <= 4)
+--- a/arch/mips/mm/cache.c
++++ b/arch/mips/mm/cache.c
+@@ -57,6 +57,7 @@ void (*_dma_cache_wback)(unsigned long s
+ void (*_dma_cache_inv)(unsigned long start, unsigned long size);
+
+ EXPORT_SYMBOL(_dma_cache_wback_inv);
++EXPORT_SYMBOL(_dma_cache_inv);
+
+ #endif /* CONFIG_DMA_NONCOHERENT */
+
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -824,6 +824,8 @@ void __init board_prom_init(void)
+ if (BCMCPU_IS_6348())
+ val |= GPIO_MODE_6348_G3_EXT_MII |
+ GPIO_MODE_6348_G0_EXT_MII;
++ else if (BCMCPU_IS_6358())
++ val |= GPIO_MODE_6358_ENET1_MII_CLK_INV;
+ }
+
+ bcm_gpio_writel(val, GPIO_MODE_REG);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -400,6 +400,8 @@
+ #define GPIO_MODE_6358_EXTRA_SPI_SS (1 << 7)
+ #define GPIO_MODE_6358_SERIAL_LED (1 << 10)
+ #define GPIO_MODE_6358_UTOPIA (1 << 12)
++#define GPIO_MODE_6358_ENET0_MII_CLK_INV (1 << 30)
++#define GPIO_MODE_6358_ENET1_MII_CLK_INV (1 << 31)
+
+
+ /*************************************************************************
--- /dev/null
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -58,6 +58,7 @@ static const unsigned long bcm96338_regs
+
+ static const int bcm96338_irqs[] = {
+ [IRQ_TIMER] = BCM_6338_TIMER_IRQ,
++ [IRQ_SPI] = BCM_6338_SPI_IRQ,
+ [IRQ_UART0] = BCM_6338_UART0_IRQ,
+ [IRQ_DSL] = BCM_6338_DSL_IRQ,
+ [IRQ_ENET0] = BCM_6338_ENET0_IRQ,
+@@ -132,6 +133,7 @@ static const unsigned long bcm96348_regs
+
+ static const int bcm96348_irqs[] = {
+ [IRQ_TIMER] = BCM_6348_TIMER_IRQ,
++ [IRQ_SPI] = BCM_6348_SPI_IRQ,
+ [IRQ_UART0] = BCM_6348_UART0_IRQ,
+ [IRQ_DSL] = BCM_6348_DSL_IRQ,
+ [IRQ_ENET0] = BCM_6348_ENET0_IRQ,
+@@ -175,6 +177,7 @@ static const unsigned long bcm96358_regs
+
+ static const int bcm96358_irqs[] = {
+ [IRQ_TIMER] = BCM_6358_TIMER_IRQ,
++ [IRQ_SPI] = BCM_6358_SPI_IRQ,
+ [IRQ_UART0] = BCM_6358_UART0_IRQ,
+ [IRQ_UART1] = BCM_6358_UART1_IRQ,
+ [IRQ_DSL] = BCM_6358_DSL_IRQ,
+--- /dev/null
++++ b/arch/mips/bcm63xx/dev-spi.c
+@@ -0,0 +1,99 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2009-2011 Florian Fainelli <florian@openwrt.org>
++ * Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/export.h>
++
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_dev_spi.h>
++#include <bcm63xx_regs.h>
++
++#ifdef BCMCPU_RUNTIME_DETECT
++/*
++ * register offsets
++ */
++static const unsigned long bcm96338_regs_spi[] = {
++ __GEN_SPI_REGS_TABLE(6338)
++};
++
++static const unsigned long bcm96348_regs_spi[] = {
++ __GEN_SPI_REGS_TABLE(6348)
++};
++
++static const unsigned long bcm96358_regs_spi[] = {
++ __GEN_SPI_REGS_TABLE(6358)
++};
++
++const unsigned long *bcm63xx_regs_spi;
++EXPORT_SYMBOL(bcm63xx_regs_spi);
++
++static __init void bcm63xx_spi_regs_init(void)
++{
++ if (BCMCPU_IS_6338())
++ bcm63xx_regs_spi = bcm96338_regs_spi;
++ if (BCMCPU_IS_6348())
++ bcm63xx_regs_spi = bcm96348_regs_spi;
++ if (BCMCPU_IS_6358())
++ bcm63xx_regs_spi = bcm96358_regs_spi;
++}
++#else
++static __init void bcm63xx_spi_regs_init(void) { }
++#endif
++
++static struct resource spi_resources[] = {
++ {
++ .start = -1, /* filled at runtime */
++ .end = -1, /* filled at runtime */
++ .flags = IORESOURCE_MEM,
++ },
++ {
++ .start = -1, /* filled at runtime */
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++static struct bcm63xx_spi_pdata spi_pdata = {
++ .bus_num = 0,
++ .num_chipselect = 8,
++ .speed_hz = 50000000, /* Fclk */
++};
++
++static struct platform_device bcm63xx_spi_device = {
++ .name = "bcm63xx-spi",
++ .id = 0,
++ .num_resources = ARRAY_SIZE(spi_resources),
++ .resource = spi_resources,
++ .dev = {
++ .platform_data = &spi_pdata,
++ },
++};
++
++int __init bcm63xx_spi_register(void)
++{
++ spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
++ spi_resources[0].end = spi_resources[0].start;
++ spi_resources[0].end += RSET_SPI_SIZE - 1;
++ spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI);
++
++ if (BCMCPU_IS_6345())
++ return -ENODEV;
++
++ /* Fill in platform data */
++ if (BCMCPU_IS_6338() || BCMCPU_IS_6348())
++ spi_pdata.fifo_size = SPI_BCM_6338_SPI_MSG_DATA_SIZE;
++
++ if (BCMCPU_IS_6358())
++ spi_pdata.fifo_size = SPI_BCM_6358_SPI_MSG_DATA_SIZE;
++
++ bcm63xx_spi_regs_init();
++
++ return platform_device_register(&bcm63xx_spi_device);
++}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -109,6 +109,7 @@ enum bcm63xx_regs_set {
+ #define RSET_WDT_SIZE 12
+ #define RSET_ENET_SIZE 2048
+ #define RSET_ENETDMA_SIZE 2048
++#define RSET_SPI_SIZE 256
+ #define RSET_UART_SIZE 24
+ #define RSET_UDC_SIZE 256
+ #define RSET_OHCI_SIZE 256
+@@ -214,7 +215,7 @@ enum bcm63xx_regs_set {
+ #define BCM_6358_UART0_BASE (0xfffe0100)
+ #define BCM_6358_UART1_BASE (0xfffe0120)
+ #define BCM_6358_GPIO_BASE (0xfffe0080)
+-#define BCM_6358_SPI_BASE (0xdeadbeef)
++#define BCM_6358_SPI_BASE (0xfffe0800)
+ #define BCM_6358_UDC0_BASE (0xfffe0400)
+ #define BCM_6358_OHCI0_BASE (0xfffe1400)
+ #define BCM_6358_OHCI_PRIV_BASE (0xdeadbeef)
+@@ -441,6 +442,7 @@ static inline unsigned long bcm63xx_regs
+ */
+ enum bcm63xx_irq {
+ IRQ_TIMER = 0,
++ IRQ_SPI,
+ IRQ_UART0,
+ IRQ_UART1,
+ IRQ_DSL,
+@@ -507,6 +509,7 @@ enum bcm63xx_irq {
+ * 6348 irqs
+ */
+ #define BCM_6348_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
++#define BCM_6348_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
+ #define BCM_6348_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
+ #define BCM_6348_DSL_IRQ (IRQ_INTERNAL_BASE + 4)
+ #define BCM_6348_UDC0_IRQ (IRQ_INTERNAL_BASE + 6)
+@@ -531,6 +534,7 @@ enum bcm63xx_irq {
+ * 6358 irqs
+ */
+ #define BCM_6358_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
++#define BCM_6358_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
+ #define BCM_6358_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
+ #define BCM_6358_UART1_IRQ (IRQ_INTERNAL_BASE + 3)
+ #define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5)
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -804,4 +804,116 @@
+ #define DMIPSPLLCFG_N2_SHIFT 29
+ #define DMIPSPLLCFG_N2_MASK (0x7 << DMIPSPLLCFG_N2_SHIFT)
+
++/*************************************************************************
++ * _REG relative to RSET_SPI
++ *************************************************************************/
++
++/* BCM 6338 SPI core */
++#define SPI_BCM_6338_SPI_CMD 0x00 /* 16-bits register */
++#define SPI_BCM_6338_SPI_INT_STATUS 0x02
++#define SPI_BCM_6338_SPI_INT_MASK_ST 0x03
++#define SPI_BCM_6338_SPI_INT_MASK 0x04
++#define SPI_BCM_6338_SPI_ST 0x05
++#define SPI_BCM_6338_SPI_CLK_CFG 0x06
++#define SPI_BCM_6338_SPI_FILL_BYTE 0x07
++#define SPI_BCM_6338_SPI_MSG_TAIL 0x09
++#define SPI_BCM_6338_SPI_RX_TAIL 0x0b
++#define SPI_BCM_6338_SPI_MSG_CTL 0x40
++#define SPI_BCM_6338_SPI_MSG_DATA 0x41
++#define SPI_BCM_6338_SPI_MSG_DATA_SIZE 0x3f
++#define SPI_BCM_6338_SPI_RX_DATA 0x80
++#define SPI_BCM_6338_SPI_RX_DATA_SIZE 0x3f
++
++/* BCM 6348 SPI core */
++#define SPI_BCM_6348_SPI_CMD 0x00 /* 16-bits register */
++#define SPI_BCM_6348_SPI_INT_STATUS 0x02
++#define SPI_BCM_6348_SPI_INT_MASK_ST 0x03
++#define SPI_BCM_6348_SPI_INT_MASK 0x04
++#define SPI_BCM_6348_SPI_ST 0x05
++#define SPI_BCM_6348_SPI_CLK_CFG 0x06
++#define SPI_BCM_6348_SPI_FILL_BYTE 0x07
++#define SPI_BCM_6348_SPI_MSG_TAIL 0x09
++#define SPI_BCM_6348_SPI_RX_TAIL 0x0b
++#define SPI_BCM_6348_SPI_MSG_CTL 0x40
++#define SPI_BCM_6348_SPI_MSG_DATA 0x41
++#define SPI_BCM_6348_SPI_MSG_DATA_SIZE 0x3f
++#define SPI_BCM_6348_SPI_RX_DATA 0x80
++#define SPI_BCM_6348_SPI_RX_DATA_SIZE 0x3f
++
++/* BCM 6358 SPI core */
++#define SPI_BCM_6358_SPI_MSG_CTL 0x00 /* 16-bits register */
++
++#define SPI_BCM_6358_SPI_MSG_DATA 0x02
++#define SPI_BCM_6358_SPI_MSG_DATA_SIZE 0x21e
++
++#define SPI_BCM_6358_SPI_RX_DATA 0x400
++#define SPI_BCM_6358_SPI_RX_DATA_SIZE 0x220
++
++#define SPI_BCM_6358_SPI_CMD 0x700 /* 16-bits register */
++
++#define SPI_BCM_6358_SPI_INT_STATUS 0x702
++#define SPI_BCM_6358_SPI_INT_MASK_ST 0x703
++
++#define SPI_BCM_6358_SPI_INT_MASK 0x704
++
++#define SPI_BCM_6358_SPI_ST 0x705
++
++#define SPI_BCM_6358_SPI_CLK_CFG 0x706
++
++#define SPI_BCM_6358_SPI_FILL_BYTE 0x707
++#define SPI_BCM_6358_SPI_MSG_TAIL 0x709
++#define SPI_BCM_6358_SPI_RX_TAIL 0x70B
++
++/* Shared SPI definitions */
++
++/* Message configuration */
++#define SPI_FD_RW 0x00
++#define SPI_HD_W 0x01
++#define SPI_HD_R 0x02
++#define SPI_BYTE_CNT_SHIFT 0
++#define SPI_MSG_TYPE_SHIFT 14
++
++/* Command */
++#define SPI_CMD_NOOP 0x00
++#define SPI_CMD_SOFT_RESET 0x01
++#define SPI_CMD_HARD_RESET 0x02
++#define SPI_CMD_START_IMMEDIATE 0x03
++#define SPI_CMD_COMMAND_SHIFT 0
++#define SPI_CMD_COMMAND_MASK 0x000f
++#define SPI_CMD_DEVICE_ID_SHIFT 4
++#define SPI_CMD_PREPEND_BYTE_CNT_SHIFT 8
++#define SPI_CMD_ONE_BYTE_SHIFT 11
++#define SPI_CMD_ONE_WIRE_SHIFT 12
++#define SPI_DEV_ID_0 0
++#define SPI_DEV_ID_1 1
++#define SPI_DEV_ID_2 2
++#define SPI_DEV_ID_3 3
++
++/* Interrupt mask */
++#define SPI_INTR_CMD_DONE 0x01
++#define SPI_INTR_RX_OVERFLOW 0x02
++#define SPI_INTR_TX_UNDERFLOW 0x04
++#define SPI_INTR_TX_OVERFLOW 0x08
++#define SPI_INTR_RX_UNDERFLOW 0x10
++#define SPI_INTR_CLEAR_ALL 0x1f
++
++/* Status */
++#define SPI_RX_EMPTY 0x02
++#define SPI_CMD_BUSY 0x04
++#define SPI_SERIAL_BUSY 0x08
++
++/* Clock configuration */
++#define SPI_CLK_20MHZ 0x00
++#define SPI_CLK_0_391MHZ 0x01
++#define SPI_CLK_0_781MHZ 0x02 /* default */
++#define SPI_CLK_1_563MHZ 0x03
++#define SPI_CLK_3_125MHZ 0x04
++#define SPI_CLK_6_250MHZ 0x05
++#define SPI_CLK_12_50MHZ 0x06
++#define SPI_CLK_25MHZ 0x07
++#define SPI_CLK_MASK 0x07
++#define SPI_SSOFFTIME_MASK 0x38
++#define SPI_SSOFFTIME_SHIFT 3
++#define SPI_BYTE_SWAP 0x80
++
+ #endif /* BCM63XX_REGS_H_ */
+--- /dev/null
++++ b/drivers/spi/bcm63xx_spi.c
+@@ -0,0 +1,496 @@
++/*
++ * Broadcom BCM63xx SPI controller support
++ *
++ * Copyright (C) 2009 Florian Fainelli <florian@openwrt.org>
++ * Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the
++ * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
++ */
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/clk.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/delay.h>
++#include <linux/interrupt.h>
++#include <linux/spi/spi.h>
++#include <linux/completion.h>
++#include <linux/err.h>
++
++#include <bcm63xx_dev_spi.h>
++
++#define PFX KBUILD_MODNAME
++#define DRV_VER "0.1.2"
++
++struct bcm63xx_spi {
++ spinlock_t lock;
++ int stopping;
++ struct completion done;
++
++ void __iomem *regs;
++ int irq;
++
++ /* Platform data */
++ u32 speed_hz;
++ unsigned fifo_size;
++
++ /* Data buffers */
++ const unsigned char *tx_ptr;
++ unsigned char *rx_ptr;
++
++ /* data iomem */
++ u8 __iomem *tx_io;
++ const u8 __iomem *rx_io;
++
++ int remaining_bytes;
++
++ struct clk *clk;
++ struct platform_device *pdev;
++};
++
++static inline u8 bcm_spi_readb(struct bcm63xx_spi *bs,
++ unsigned int offset)
++{
++ return bcm_readw(bs->regs + bcm63xx_spireg(offset));
++}
++
++static inline u16 bcm_spi_readw(struct bcm63xx_spi *bs,
++ unsigned int offset)
++{
++ return bcm_readw(bs->regs + bcm63xx_spireg(offset));
++}
++
++static inline void bcm_spi_writeb(struct bcm63xx_spi *bs,
++ u8 value, unsigned int offset)
++{
++ bcm_writeb(value, bs->regs + bcm63xx_spireg(offset));
++}
++
++static inline void bcm_spi_writew(struct bcm63xx_spi *bs,
++ u16 value, unsigned int offset)
++{
++ bcm_writew(value, bs->regs + bcm63xx_spireg(offset));
++}
++
++static int bcm63xx_spi_setup_transfer(struct spi_device *spi,
++ struct spi_transfer *t)
++{
++ u8 bits_per_word;
++ u8 clk_cfg;
++ u32 hz;
++ unsigned int div;
++
++ struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master);
++
++ bits_per_word = (t) ? t->bits_per_word : spi->bits_per_word;
++ hz = (t) ? t->speed_hz : spi->max_speed_hz;
++ if (bits_per_word != 8) {
++ dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",
++ __func__, bits_per_word);
++ return -EINVAL;
++ }
++
++ if (spi->chip_select > spi->master->num_chipselect) {
++ dev_err(&spi->dev, "%s, unsupported slave %d\n",
++ __func__, spi->chip_select);
++ return -EINVAL;
++ }
++
++ /* Check clock setting */
++ div = (bs->speed_hz / hz);
++ switch (div) {
++ case 2:
++ clk_cfg = SPI_CLK_25MHZ;
++ break;
++ case 4:
++ clk_cfg = SPI_CLK_12_50MHZ;
++ break;
++ case 8:
++ clk_cfg = SPI_CLK_6_250MHZ;
++ break;
++ case 16:
++ clk_cfg = SPI_CLK_3_125MHZ;
++ break;
++ case 32:
++ clk_cfg = SPI_CLK_1_563MHZ;
++ break;
++ case 64:
++ clk_cfg = SPI_CLK_0_781MHZ;
++ break;
++ case 128:
++ default:
++ /* Set to slowest mode for compatibility */
++ clk_cfg = SPI_CLK_0_391MHZ;
++ break;
++ }
++
++ bcm_spi_writeb(bs, clk_cfg, SPI_CLK_CFG);
++ dev_dbg(&spi->dev, "Setting clock register to %d (hz %d, cmd %02x)\n",
++ div, hz, clk_cfg);
++
++ return 0;
++}
++
++/* the spi->mode bits understood by this driver: */
++#define MODEBITS (SPI_CPOL | SPI_CPHA)
++
++static int bcm63xx_spi_setup(struct spi_device *spi)
++{
++ struct bcm63xx_spi *bs;
++ int ret;
++
++ bs = spi_master_get_devdata(spi->master);
++
++ if (bs->stopping)
++ return -ESHUTDOWN;
++
++ if (!spi->bits_per_word)
++ spi->bits_per_word = 8;
++
++ if (spi->mode & ~MODEBITS) {
++ dev_err(&spi->dev, "%s, unsupported mode bits %x\n",
++ __func__, spi->mode & ~MODEBITS);
++ return -EINVAL;
++ }
++
++ ret = bcm63xx_spi_setup_transfer(spi, NULL);
++ if (ret < 0) {
++ dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
++ spi->mode & ~MODEBITS);
++ return ret;
++ }
++
++ dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec/bit\n",
++ __func__, spi->mode & MODEBITS, spi->bits_per_word, 0);
++
++ return 0;
++}
++
++/* Fill the TX FIFO with as many bytes as possible */
++static void bcm63xx_spi_fill_tx_fifo(struct bcm63xx_spi *bs)
++{
++ u8 size;
++
++ /* Fill the Tx FIFO with as many bytes as possible */
++ size = bs->remaining_bytes < bs->fifo_size ? bs->remaining_bytes :
++ bs->fifo_size;
++ memcpy_toio(bs->tx_io, bs->tx_ptr, size);
++ bs->remaining_bytes -= size;
++}
++
++static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
++{
++ struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master);
++ u16 msg_ctl;
++ u16 cmd;
++
++ dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n",
++ t->tx_buf, t->rx_buf, t->len);
++
++ /* Transmitter is inhibited */
++ bs->tx_ptr = t->tx_buf;
++ bs->rx_ptr = t->rx_buf;
++ init_completion(&bs->done);
++
++ if (t->tx_buf) {
++ bs->remaining_bytes = t->len;
++ bcm63xx_spi_fill_tx_fifo(bs);
++ }
++
++ /* Enable the command done interrupt which
++ * we use to determine completion of a command */
++ bcm_spi_writeb(bs, SPI_INTR_CMD_DONE, SPI_INT_MASK);
++
++ /* Fill in the Message control register */
++ msg_ctl = (t->len << SPI_BYTE_CNT_SHIFT);
++
++ if (t->rx_buf && t->tx_buf)
++ msg_ctl |= (SPI_FD_RW << SPI_MSG_TYPE_SHIFT);
++ else if (t->rx_buf)
++ msg_ctl |= (SPI_HD_R << SPI_MSG_TYPE_SHIFT);
++ else if (t->tx_buf)
++ msg_ctl |= (SPI_HD_W << SPI_MSG_TYPE_SHIFT);
++
++ bcm_spi_writew(bs, msg_ctl, SPI_MSG_CTL);
++
++ /* Issue the transfer */
++ cmd = SPI_CMD_START_IMMEDIATE;
++ cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT);
++ cmd |= (spi->chip_select << SPI_CMD_DEVICE_ID_SHIFT);
++ bcm_spi_writew(bs, cmd, SPI_CMD);
++ wait_for_completion(&bs->done);
++
++ /* Disable the CMD_DONE interrupt */
++ bcm_spi_writeb(bs, 0, SPI_INT_MASK);
++
++ return t->len - bs->remaining_bytes;
++}
++
++static int bcm63xx_transfer(struct spi_device *spi, struct spi_message *m)
++{
++ struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master);
++ struct spi_transfer *t;
++ int ret = 0;
++
++ if (unlikely(list_empty(&m->transfers)))
++ return -EINVAL;
++
++ if (bs->stopping)
++ return -ESHUTDOWN;
++
++ list_for_each_entry(t, &m->transfers, transfer_list) {
++ ret += bcm63xx_txrx_bufs(spi, t);
++ }
++
++ m->complete(m->context);
++
++ return ret;
++}
++
++/* This driver supports single master mode only. Hence
++ * CMD_DONE is the only interrupt we care about
++ */
++static irqreturn_t bcm63xx_spi_interrupt(int irq, void *dev_id)
++{
++ struct spi_master *master = (struct spi_master *)dev_id;
++ struct bcm63xx_spi *bs = spi_master_get_devdata(master);
++ u8 intr;
++ u16 cmd;
++
++ /* Read interupts and clear them immediately */
++ intr = bcm_spi_readb(bs, SPI_INT_STATUS);
++ bcm_spi_writeb(bs, SPI_INTR_CLEAR_ALL, SPI_INT_STATUS);
++ bcm_spi_writeb(bs, 0, SPI_INT_MASK);
++
++ /* A tansfer completed */
++ if (intr & SPI_INTR_CMD_DONE) {
++ u8 rx_tail;
++
++ rx_tail = bcm_spi_readb(bs, SPI_RX_TAIL);
++
++ /* Read out all the data */
++ if (rx_tail)
++ memcpy_fromio(bs->rx_ptr, bs->rx_io, rx_tail);
++
++ /* See if there is more data to send */
++ if (bs->remaining_bytes > 0) {
++ bcm63xx_spi_fill_tx_fifo(bs);
++
++ /* Start the transfer */
++ bcm_spi_writew(bs, SPI_HD_W << SPI_MSG_TYPE_SHIFT,
++ SPI_MSG_CTL);
++ cmd = bcm_spi_readw(bs, SPI_CMD);
++ cmd |= SPI_CMD_START_IMMEDIATE;
++ cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT);
++ bcm_spi_writeb(bs, SPI_INTR_CMD_DONE, SPI_INT_MASK);
++ bcm_spi_writew(bs, cmd, SPI_CMD);
++ } else {
++ complete(&bs->done);
++ }
++ }
++
++ return IRQ_HANDLED;
++}
++
++
++static int __init bcm63xx_spi_probe(struct platform_device *pdev)
++{
++ struct resource *r;
++ struct device *dev = &pdev->dev;
++ struct bcm63xx_spi_pdata *pdata = pdev->dev.platform_data;
++ int irq;
++ struct spi_master *master;
++ struct clk *clk;
++ struct bcm63xx_spi *bs;
++ int ret;
++
++ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ if (!r) {
++ dev_err(dev, "no iomem\n");
++ ret = -ENXIO;
++ goto out;
++ }
++
++ irq = platform_get_irq(pdev, 0);
++ if (irq < 0) {
++ dev_err(dev, "no irq\n");
++ ret = -ENXIO;
++ goto out;
++ }
++
++ clk = clk_get(dev, "spi");
++ if (IS_ERR(clk)) {
++ dev_err(dev, "no clock for device\n");
++ ret = -ENODEV;
++ goto out;
++ }
++
++ master = spi_alloc_master(dev, sizeof(*bs));
++ if (!master) {
++ dev_err(dev, "out of memory\n");
++ ret = -ENOMEM;
++ goto out_free;
++ }
++
++ bs = spi_master_get_devdata(master);
++ init_completion(&bs->done);
++
++ platform_set_drvdata(pdev, master);
++ bs->pdev = pdev;
++
++ if (!request_mem_region(r->start, r->end - r->start, PFX)) {
++ dev_err(dev, "iomem request failed\n");
++ ret = -ENXIO;
++ goto out_put_master;
++ }
++
++ bs->regs = ioremap_nocache(r->start, r->end - r->start);
++ if (!bs->regs) {
++ dev_err(dev, "unable to ioremap regs\n");
++ ret = -ENOMEM;
++ goto out_put_master;
++ }
++ bs->irq = irq;
++ bs->clk = clk;
++ bs->fifo_size = pdata->fifo_size;
++
++ ret = request_irq(irq, bcm63xx_spi_interrupt, 0, pdev->name, master);
++ if (ret) {
++ dev_err(dev, "unable to request irq\n");
++ goto out_unmap;
++ }
++
++ master->bus_num = pdata->bus_num;
++ master->num_chipselect = pdata->num_chipselect;
++ master->setup = bcm63xx_spi_setup;
++ master->transfer = bcm63xx_transfer;
++ bs->speed_hz = pdata->speed_hz;
++ bs->stopping = 0;
++ bs->tx_io = (u8*)(bs->regs + bcm63xx_spireg(SPI_MSG_DATA));
++ bs->rx_io = (const u8*)(bs->regs + bcm63xx_spireg(SPI_RX_DATA));
++ spin_lock_init(&bs->lock);
++
++ /* Initialize hardware */
++ clk_enable(bs->clk);
++ bcm_spi_writeb(bs, SPI_INTR_CLEAR_ALL, SPI_INT_STATUS);
++
++ /* register and we are done */
++ ret = spi_register_master(master);
++ if (ret) {
++ dev_err(dev, "spi register failed\n");
++ goto out_reset_hw;
++ }
++
++ dev_info(dev, "at 0x%08x (irq %d, FIFOs size %d) v%s\n",
++ r->start, irq, bs->fifo_size, DRV_VER);
++
++ return 0;
++
++out_reset_hw:
++ clk_disable(clk);
++ free_irq(irq, master);
++out_unmap:
++ iounmap(bs->regs);
++out_put_master:
++ spi_master_put(master);
++out_free:
++ clk_put(clk);
++out:
++ return ret;
++}
++
++static int __exit bcm63xx_spi_remove(struct platform_device *pdev)
++{
++ struct spi_master *master = platform_get_drvdata(pdev);
++ struct bcm63xx_spi *bs = spi_master_get_devdata(master);
++ struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++
++ /* reset spi block */
++ bcm_spi_writeb(bs, 0, SPI_INT_MASK);
++ spin_lock(&bs->lock);
++ bs->stopping = 1;
++
++ /* HW shutdown */
++ clk_disable(bs->clk);
++ clk_put(bs->clk);
++
++ spin_unlock(&bs->lock);
++
++ free_irq(bs->irq, master);
++ iounmap(bs->regs);
++ release_mem_region(r->start, r->end - r->start);
++ platform_set_drvdata(pdev, 0);
++ spi_unregister_master(master);
++
++ return 0;
++}
++
++#ifdef CONFIG_PM
++static int bcm63xx_spi_suspend(struct platform_device *pdev, pm_message_t mesg)
++{
++ struct spi_master *master = platform_get_drvdata(pdev);
++ struct bcm63xx_spi *bs = spi_master_get_devdata(master);
++
++ clk_disable(bs->clk);
++
++ return 0;
++}
++
++static int bcm63xx_spi_resume(struct platform_device *pdev)
++{
++ struct spi_master *master = platform_get_drvdata(pdev);
++ struct bcm63xx_spi *bs = spi_master_get_devdata(master);
++
++ clk_enable(bs->clk);
++
++ return 0;
++}
++#else
++#define bcm63xx_spi_suspend NULL
++#define bcm63xx_spi_resume NULL
++#endif
++
++static struct platform_driver bcm63xx_spi_driver = {
++ .driver = {
++ .name = "bcm63xx-spi",
++ .owner = THIS_MODULE,
++ },
++ .probe = bcm63xx_spi_probe,
++ .remove = __exit_p(bcm63xx_spi_remove),
++ .suspend = bcm63xx_spi_suspend,
++ .resume = bcm63xx_spi_resume,
++};
++
++
++static int __init bcm63xx_spi_init(void)
++{
++ return platform_driver_register(&bcm63xx_spi_driver);
++}
++
++static void __exit bcm63xx_spi_exit(void)
++{
++ platform_driver_unregister(&bcm63xx_spi_driver);
++}
++
++module_init(bcm63xx_spi_init);
++module_exit(bcm63xx_spi_exit);
++
++MODULE_ALIAS("platform:bcm63xx_spi");
++MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
++MODULE_AUTHOR("Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>");
++MODULE_DESCRIPTION("Broadcom BCM63xx SPI Controller driver");
++MODULE_LICENSE("GPL");
++MODULE_VERSION(DRV_VER);
+--- a/drivers/spi/Kconfig
++++ b/drivers/spi/Kconfig
+@@ -74,6 +74,12 @@ config SPI_ATMEL
+ This selects a driver for the Atmel SPI Controller, present on
+ many AT32 (AVR32) and AT91 (ARM) chips.
+
++config SPI_BCM63XX
++ tristate "Broadcom BCM63xx SPI controller"
++ depends on BCM63XX
++ help
++ This is the SPI controller master driver for Broadcom BCM63xx SoC.
++
+ config SPI_BFIN
+ tristate "SPI controller driver for ADI Blackfin5xx"
+ depends on BLACKFIN
+--- a/drivers/spi/Makefile
++++ b/drivers/spi/Makefile
+@@ -14,6 +14,7 @@ obj-$(CONFIG_SPI_ALTERA) += spi-altera.
+ obj-$(CONFIG_SPI_ATMEL) += spi-atmel.o
+ obj-$(CONFIG_SPI_ATH79) += spi-ath79.o
+ obj-$(CONFIG_SPI_AU1550) += spi-au1550.o
++obj-$(CONFIG_SPI_BCM63XX) += bcm63xx_spi.o
+ obj-$(CONFIG_SPI_BFIN) += spi-bfin5xx.o
+ obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o
+ obj-$(CONFIG_SPI_BITBANG) += spi-bitbang.o
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
+@@ -0,0 +1,85 @@
++#ifndef BCM63XX_DEV_SPI_H
++#define BCM63XX_DEV_SPI_H
++
++#include <linux/types.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_regs.h>
++
++int __init bcm63xx_spi_register(void);
++
++struct bcm63xx_spi_pdata {
++ unsigned int fifo_size;
++ int bus_num;
++ int num_chipselect;
++ u32 speed_hz;
++};
++
++enum bcm63xx_regs_spi {
++ SPI_CMD,
++ SPI_INT_STATUS,
++ SPI_INT_MASK_ST,
++ SPI_INT_MASK,
++ SPI_ST,
++ SPI_CLK_CFG,
++ SPI_FILL_BYTE,
++ SPI_MSG_TAIL,
++ SPI_RX_TAIL,
++ SPI_MSG_CTL,
++ SPI_MSG_DATA,
++ SPI_RX_DATA,
++};
++
++#define __GEN_SPI_RSET_BASE(__cpu, __rset) \
++ case SPI_## __rset: \
++ return SPI_BCM_## __cpu ##_SPI_## __rset;
++
++#define __GEN_SPI_RSET(__cpu) \
++ switch (reg) { \
++ __GEN_SPI_RSET_BASE(__cpu, CMD) \
++ __GEN_SPI_RSET_BASE(__cpu, INT_STATUS) \
++ __GEN_SPI_RSET_BASE(__cpu, INT_MASK_ST) \
++ __GEN_SPI_RSET_BASE(__cpu, INT_MASK) \
++ __GEN_SPI_RSET_BASE(__cpu, ST) \
++ __GEN_SPI_RSET_BASE(__cpu, CLK_CFG) \
++ __GEN_SPI_RSET_BASE(__cpu, FILL_BYTE) \
++ __GEN_SPI_RSET_BASE(__cpu, MSG_TAIL) \
++ __GEN_SPI_RSET_BASE(__cpu, RX_TAIL) \
++ __GEN_SPI_RSET_BASE(__cpu, MSG_CTL) \
++ __GEN_SPI_RSET_BASE(__cpu, MSG_DATA) \
++ __GEN_SPI_RSET_BASE(__cpu, RX_DATA) \
++ }
++
++#define __GEN_SPI_REGS_TABLE(__cpu) \
++ [SPI_CMD] = SPI_BCM_## __cpu ##_SPI_CMD, \
++ [SPI_INT_STATUS] = SPI_BCM_## __cpu ##_SPI_INT_STATUS, \
++ [SPI_INT_MASK_ST] = SPI_BCM_## __cpu ##_SPI_INT_MASK_ST, \
++ [SPI_INT_MASK] = SPI_BCM_## __cpu ##_SPI_INT_MASK, \
++ [SPI_ST] = SPI_BCM_## __cpu ##_SPI_ST, \
++ [SPI_CLK_CFG] = SPI_BCM_## __cpu ##_SPI_CLK_CFG, \
++ [SPI_FILL_BYTE] = SPI_BCM_## __cpu ##_SPI_FILL_BYTE, \
++ [SPI_MSG_TAIL] = SPI_BCM_## __cpu ##_SPI_MSG_TAIL, \
++ [SPI_RX_TAIL] = SPI_BCM_## __cpu ##_SPI_RX_TAIL, \
++ [SPI_MSG_CTL] = SPI_BCM_## __cpu ##_SPI_MSG_CTL, \
++ [SPI_MSG_DATA] = SPI_BCM_## __cpu ##_SPI_MSG_DATA, \
++ [SPI_RX_DATA] = SPI_BCM_## __cpu ##_SPI_RX_DATA,
++
++static inline unsigned long bcm63xx_spireg(enum bcm63xx_regs_spi reg)
++{
++#ifdef BCMCPU_RUNTIME_DETECT
++ extern const unsigned long *bcm63xx_regs_spi;
++ return bcm63xx_regs_spi[reg];
++#else
++#ifdef CONFIG_BCM63XX_CPU_6338
++ __GEN_SPI_RSET(6338)
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6348
++ __GEN_SPI_RSET(6348)
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6358
++ __GEN_SPI_RSET(6358)
++#endif
++#endif
++ return 0;
++}
++
++#endif /* BCM63XX_DEV_SPI_H */
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -1,6 +1,6 @@
+ obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \
+ dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o \
+- dev-usb-ohci.o dev-usb-ehci.o dev-usb-udc.o
++ dev-usb-ohci.o dev-usb-ehci.o dev-usb-udc.o dev-spi.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
+ obj-y += boards/
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -31,6 +31,7 @@
+ #include <bcm63xx_dev_usb_ohci.h>
+ #include <bcm63xx_dev_usb_ehci.h>
+ #include <bcm63xx_dev_usb_udc.h>
++#include <bcm63xx_dev_spi.h>
+ #include <board_bcm963xx.h>
+
+ #define PFX "board_bcm963xx: "
+@@ -934,6 +935,8 @@ int __init board_register_devices(void)
+ if (board.num_spis)
+ spi_register_board_info(board.spis, board.num_spis);
+
++ bcm63xx_spi_register();
++
+ /* read base address of boot chip select (0) */
+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+ val &= MPI_CSBASE_BASE_MASK;
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -33,9 +33,13 @@
+ #include <bcm63xx_dev_usb_udc.h>
+ #include <bcm63xx_dev_spi.h>
+ #include <board_bcm963xx.h>
++#include <bcm_tag.h>
+
+ #define PFX "board_bcm963xx: "
+
++#define CFE_OFFSET_64K 0x10000
++#define CFE_OFFSET_128K 0x20000
++
+ static struct bcm963xx_nvram nvram;
+ static unsigned int mac_addr_used;
+ static struct board_info board;
+@@ -735,6 +739,29 @@ static int board_get_mac_address(u8 *mac
+ return 0;
+ }
+
++static void __init boardid_fixup(u8 *boot_addr)
++{
++ struct bcm_tag *tag = (struct bcm_tag *)(boot_addr + CFE_OFFSET_64K);
++
++ /* check if bcm_tag is at 64k offset */
++ if (strncmp(nvram.name, tag->boardid, BOARDID_LEN) != 0) {
++ /* else try 128k */
++ tag = (struct bcm_tag *)(boot_addr + CFE_OFFSET_128K);
++ if (strncmp(nvram.name, tag->boardid, BOARDID_LEN) != 0) {
++ /* No tag found */
++ printk(KERN_DEBUG "No bcm_tag found!\n");
++ return;
++ }
++ }
++ /* check if we should override the boardid */
++ if (tag->information1[0] != '+')
++ return;
++
++ strncpy(nvram.name, &tag->information1[1], BOARDID_LEN);
++
++ printk(KERN_INFO "Overriding boardid with '%s'\n", nvram.name);
++}
++
+ /*
+ * early init callback, read nvram data from flash and checksum it
+ */
+@@ -777,6 +804,11 @@ void __init board_prom_init(void)
+ return;
+ }
+
++ if (strcmp(cfe_version, "unknown") != 0) {
++ /* cfe present */
++ boardid_fixup(boot_addr);
++ }
++
+ /* find board by name */
+ for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
+ if (strncmp(nvram.name, bcm963xx_boards[i]->name,
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -862,18 +862,6 @@ void __init board_prom_init(void)
+ }
+
+ bcm_gpio_writel(val, GPIO_MODE_REG);
+-
+- /* Generate MAC address for WLAN and
+- * register our SPROM */
+-#ifdef CONFIG_SSB_PCIHOST
+- if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
+- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+- if (ssb_arch_register_fallback_sprom(
+- &bcm63xx_get_fallback_sprom) < 0)
+- printk(KERN_ERR PFX "failed to register fallback SPROM\n");
+- }
+-#endif
+ }
+
+ /*
+@@ -949,6 +937,19 @@ int __init board_register_devices(void)
+ !board_get_mac_address(board.enet1.mac_addr))
+ bcm63xx_enet_register(1, &board.enet1);
+
++ /* Generate MAC address for WLAN and
++ * register our SPROM, do this after registering enet devices
++ */
++#ifdef CONFIG_SSB_PCIHOST
++ if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
++ memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
++ memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
++ if (ssb_arch_register_fallback_sprom(
++ &bcm63xx_get_fallback_sprom) < 0)
++ printk(KERN_ERR PFX "failed to register fallback SPROM\n");
++ }
++#endif
++
+ if (board.has_ehci0)
+ bcm63xx_ehci_register();
+
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -604,6 +604,99 @@ static struct board_info __initdata boar
+
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
++
++ .leds = {
++ /*Each led on alice gate is bi-color */
++ {
++ .name = "power:red",
++ .gpio = 5,
++ .active_low = 1,
++ },
++ {
++ .name = "power:green",
++ .gpio = 4,
++ .active_low = 1,
++ .default_trigger = "default-on",
++ },
++ {
++ .name = "service:red",
++ .gpio = 7,
++ .active_low = 1,
++ },
++ {
++ .name = "service:green",
++ .gpio = 6,
++ .active_low = 1,
++ },
++ {
++ .name = "adsl:red",
++ .gpio = 9,
++ .active_low = 1,
++ },
++ {
++ .name = "adsl:green",
++ .gpio = 10,
++ .active_low = 1,
++ },
++ {
++ .name = "wifi:red",
++ .gpio = 23,
++ .active_low = 1,
++ },
++ {
++ .name = "wifi:green",
++ .gpio = 22,
++ .active_low = 1,
++ },
++ {
++ .name = "internet:red",
++ .gpio = 25,
++ .active_low = 1,
++ },
++ {
++ .name = "internet:green",
++ .gpio = 24,
++ .active_low = 1,
++ },
++ {
++ .name = "usr1:red",
++ .gpio = 27,
++ .active_low = 1,
++ },
++ {
++ .name = "usr1:green",
++ .gpio = 26,
++ .active_low = 1,
++ },
++ {
++ .name = "usr2:red",
++ .gpio = 30,
++ .active_low = 1,
++ },
++ {
++ .name = "usr2:green",
++ .gpio = 29,
++ .active_low = 1,
++ },
++ },
++
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 37,
++ .active_low = 1,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ {
++ .desc = "wps",
++ .gpio = 34,
++ .type = EV_KEY,
++ .code = KEY_WPS_BUTTON,
++ .threshold = 3,
++ },
++ },
+ };
+
+ static struct board_info __initdata board_DWVS0 = {
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -57,7 +57,7 @@ struct board_info {
+ struct bcm63xx_dsp_platform_data dsp;
+
+ /* GPIO LEDs */
+- struct gpio_led leds[5];
++ struct gpio_led leds[14];
+
+ /* Buttons */
+ struct gpio_button buttons[2];
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -476,6 +476,19 @@ static struct board_info __initdata boar
+ },
+
+ .has_ohci0 = 1,
++
++ .leds = {
++ {
++ .name = "adsl",
++ .gpio = 3,
++ .active_low = 1,
++ },
++ {
++ .name = "usb",
++ .gpio = 0,
++ .active_low = 1,
++ }
++ },
+ };
+ #endif
+
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -490,6 +490,55 @@ static struct board_info __initdata boar
+ }
+ },
+ };
++
++static struct board_info __initdata board_96348_D4PW = {
++ .name = "D-4P-W",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet1 = 1,
++ .has_pci = 1,
++ .has_uart0 = 1,
++
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .leds = {
++ {
++ .name = "power:green",
++ .gpio = 0,
++ .active_low = 1,
++ },
++ {
++ .name = "status",
++ .gpio = 3,
++ .active_low = 1,
++ },
++ {
++ .name = "internet:green",
++ .gpio = 4,
++ .active_low = 1,
++ },
++ {
++ .name = "internet:red",
++ .gpio = 5,
++ .active_low = 1,
++ },
++ },
++
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 7,
++ .active_low = 1,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ },
++};
++
+ #endif
+
+ /*
+@@ -754,6 +803,7 @@ static const struct board_info __initdat
+ &board_DV201AMR,
+ &board_96348gw_a,
+ &board_rta1025w_16,
++ &board_96348_D4PW,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -18,6 +18,9 @@
+ #include <linux/gpio_buttons.h>
+ #include <linux/input.h>
+ #include <linux/export.h>
++#include <linux/spi/spi.h>
++#include <linux/spi/spi_gpio.h>
++#include <linux/spi/74x164.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+@@ -40,6 +43,12 @@
+ #define CFE_OFFSET_64K 0x10000
+ #define CFE_OFFSET_128K 0x20000
+
++#define NB4_PID_OFFSET 0xff80
++#define NB4_74X164_GPIO_BASE 64
++#define NB4_SPI_GPIO_MOSI 7
++#define NB4_SPI_GPIO_CLK 6
++#define NB4_74HC64_GPIO(X) (NB4_74X164_GPIO_BASE + (X))
++
+ static struct bcm963xx_nvram nvram;
+ static unsigned int mac_addr_used;
+ static struct board_info board;
+@@ -781,6 +790,502 @@ static struct board_info __initdata boar
+
+ .has_ohci0 = 1,
+ };
++
++struct spi_gpio_platform_data nb4_spi_gpio_data = {
++ .sck = NB4_SPI_GPIO_CLK,
++ .mosi = NB4_SPI_GPIO_MOSI,
++ .miso = SPI_GPIO_NO_MISO,
++ .num_chipselect = 1,
++};
++
++
++static struct platform_device nb4_spi_gpio = {
++ .name = "spi_gpio",
++ .id = 1,
++ .dev = {
++ .platform_data = &nb4_spi_gpio_data,
++ },
++};
++
++static struct platform_device * __initdata nb4_devices[] = {
++ &nb4_spi_gpio,
++};
++
++const struct gen_74x164_chip_platform_data nb4_74x164_platform_data = {
++ .base = NB4_74X164_GPIO_BASE
++};
++
++static struct spi_board_info nb4_spi_devices[] = {
++ {
++ .modalias = "74x164",
++ .max_speed_hz = 781000,
++ .bus_num = 1,
++ .controller_data = (void *) SPI_GPIO_NO_CHIPSELECT,
++ .mode = SPI_MODE_0,
++ .platform_data = &nb4_74x164_platform_data
++ }
++};
++
++static struct board_info __initdata board_nb4_ser_r0 = {
++ .name = "NB4-SER-r0",
++ .expected_cpu_id = 0x6358,
++
++ .has_uart0 = 1,
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++
++ .has_udc0 = 1,
++
++ .leds = {
++ {
++ .name = "adsl",
++ .gpio = NB4_74HC64_GPIO(4),
++ .active_low = 1,
++ },
++ {
++ .name = "traffic",
++ .gpio = 2,
++ .active_low = 1,
++ },
++ {
++ .name = "tel",
++ .gpio = NB4_74HC64_GPIO(3),
++ .active_low = 1,
++ },
++ {
++ .name = "tv",
++ .gpio = NB4_74HC64_GPIO(2),
++ .active_low = 1,
++ },
++ {
++ .name = "wifi",
++ .gpio = 15,
++ .active_low = 1,
++ },
++ {
++ .name = "alarm",
++ .gpio = NB4_74HC64_GPIO(0),
++ .active_low = 1,
++ },
++ {
++ .name = "service:red",
++ .gpio = 29,
++ .active_low = 1,
++ },
++ {
++ .name = "service:green",
++ .gpio = 30,
++ .active_low = 1,
++ },
++ {
++ .name = "service:blue",
++ .gpio = 4,
++ .active_low = 1,
++ },
++ },
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 34,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ {
++ .desc = "wps",
++ .gpio = 37,
++ .type = EV_KEY,
++ .code = KEY_WPS_BUTTON,
++ .threshold = 3,
++ },
++ },
++ .devs = nb4_devices,
++ .num_devs = ARRAY_SIZE(nb4_devices),
++ .spis = nb4_spi_devices,
++ .num_spis = ARRAY_SIZE(nb4_spi_devices),
++};
++
++static struct board_info __initdata board_nb4_ser_r1 = {
++ .name = "NB4-SER-r1",
++ .expected_cpu_id = 0x6358,
++
++ .has_uart0 = 1,
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++
++ .has_udc0 = 1,
++
++ .leds = {
++ {
++ .name = "adsl",
++ .gpio = NB4_74HC64_GPIO(4),
++ .active_low = 1,
++ },
++ {
++ .name = "traffic",
++ .gpio = 2,
++ .active_low = 1,
++ },
++ {
++ .name = "tel",
++ .gpio = NB4_74HC64_GPIO(3),
++ .active_low = 1,
++ },
++ {
++ .name = "tv",
++ .gpio = NB4_74HC64_GPIO(2),
++ .active_low = 1,
++ },
++ {
++ .name = "wifi",
++ .gpio = 15,
++ .active_low = 1,
++ },
++ {
++ .name = "alarm",
++ .gpio = NB4_74HC64_GPIO(0),
++ .active_low = 1,
++ },
++ {
++ .name = "service:red",
++ .gpio = 29,
++ .active_low = 1,
++ },
++ {
++ .name = "service:green",
++ .gpio = 30,
++ .active_low = 1,
++ },
++ {
++ .name = "service:blue",
++ .gpio = 4,
++ .active_low = 1,
++ },
++ },
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 34,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ {
++ .desc = "wps",
++ .gpio = 37,
++ .type = EV_KEY,
++ .code = KEY_WPS_BUTTON,
++ .threshold = 3,
++ },
++ },
++ .devs = nb4_devices,
++ .num_devs = ARRAY_SIZE(nb4_devices),
++ .spis = nb4_spi_devices,
++ .num_spis = ARRAY_SIZE(nb4_spi_devices),
++};
++
++static struct board_info __initdata board_nb4_ser_r2 = {
++ .name = "NB4-SER-r2",
++ .expected_cpu_id = 0x6358,
++
++ .has_uart0 = 1,
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++
++ .leds = {
++ {
++ .name = "adsl",
++ .gpio = NB4_74HC64_GPIO(4),
++ .active_low = 1,
++ },
++ {
++ .name = "traffic",
++ .gpio = 2,
++ .active_low = 1,
++ },
++ {
++ .name = "tel",
++ .gpio = NB4_74HC64_GPIO(3),
++ .active_low = 1,
++ },
++ {
++ .name = "tv",
++ .gpio = NB4_74HC64_GPIO(2),
++ .active_low = 1,
++ },
++ {
++ .name = "wifi",
++ .gpio = 15,
++ .active_low = 1,
++ },
++ {
++ .name = "alarm",
++ .gpio = NB4_74HC64_GPIO(0),
++ .active_low = 1,
++ },
++ {
++ .name = "service:red",
++ .gpio = 29,
++ .active_low = 1,
++ },
++ {
++ .name = "service:green",
++ .gpio = 30,
++ .active_low = 1,
++ },
++ {
++ .name = "service:blue",
++ .gpio = 4,
++ .active_low = 1,
++ },
++ },
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 34,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ {
++ .desc = "wps",
++ .gpio = 37,
++ .type = EV_KEY,
++ .code = KEY_WPS_BUTTON,
++ .threshold = 3,
++ },
++ },
++ .devs = nb4_devices,
++ .num_devs = ARRAY_SIZE(nb4_devices),
++ .spis = nb4_spi_devices,
++ .num_spis = ARRAY_SIZE(nb4_spi_devices),
++};
++
++static struct board_info __initdata board_nb4_fxc_r1 = {
++ .name = "NB4-FXC-r1",
++ .expected_cpu_id = 0x6358,
++
++ .has_uart0 = 1,
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++
++ .has_udc0 = 1,
++
++ .leds = {
++ {
++ .name = "adsl",
++ .gpio = NB4_74HC64_GPIO(4),
++ .active_low = 1,
++ },
++ {
++ .name = "traffic",
++ .gpio = 2,
++ },
++ {
++ .name = "tel",
++ .gpio = NB4_74HC64_GPIO(3),
++ .active_low = 1,
++ },
++ {
++ .name = "tv",
++ .gpio = NB4_74HC64_GPIO(2),
++ .active_low = 1,
++ },
++ {
++ .name = "wifi",
++ .gpio = 15,
++ },
++ {
++ .name = "alarm",
++ .gpio = NB4_74HC64_GPIO(0),
++ .active_low = 1,
++ },
++ {
++ .name = "service:red",
++ .gpio = 29,
++ },
++ {
++ .name = "service:green",
++ .gpio = 30,
++ },
++ {
++ .name = "service:blue",
++ .gpio = 4,
++ },
++ },
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 34,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ {
++ .desc = "wps",
++ .gpio = 37,
++ .type = EV_KEY,
++ .code = KEY_WPS_BUTTON,
++ .threshold = 3,
++ },
++ },
++ .devs = nb4_devices,
++ .num_devs = ARRAY_SIZE(nb4_devices),
++ .spis = nb4_spi_devices,
++ .num_spis = ARRAY_SIZE(nb4_spi_devices),
++};
++
++static struct board_info __initdata board_nb4_fxc_r2 = {
++ .name = "NB4-FXC-r2",
++ .expected_cpu_id = 0x6358,
++
++ .has_uart0 = 1,
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++
++ .leds = {
++ {
++ .name = "adsl",
++ .gpio = NB4_74HC64_GPIO(4),
++ .active_low = 1,
++ },
++ {
++ .name = "traffic",
++ .gpio = 2,
++ },
++ {
++ .name = "tel",
++ .gpio = NB4_74HC64_GPIO(3),
++ .active_low = 1,
++ },
++ {
++ .name = "tv",
++ .gpio = NB4_74HC64_GPIO(2),
++ .active_low = 1,
++ },
++ {
++ .name = "wifi",
++ .gpio = 15,
++ },
++ {
++ .name = "alarm",
++ .gpio = NB4_74HC64_GPIO(0),
++ .active_low = 1,
++ },
++ {
++ .name = "service:red",
++ .gpio = 29,
++ },
++ {
++ .name = "service:green",
++ .gpio = 30,
++ },
++ {
++ .name = "service:blue",
++ .gpio = 4,
++ },
++ },
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 34,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ {
++ .desc = "wps",
++ .gpio = 37,
++ .type = EV_KEY,
++ .code = KEY_WPS_BUTTON,
++ .threshold = 3,
++ },
++ },
++ .devs = nb4_devices,
++ .num_devs = ARRAY_SIZE(nb4_devices),
++ .spis = nb4_spi_devices,
++ .num_spis = ARRAY_SIZE(nb4_spi_devices),
++};
+ #endif
+
+ /*
+@@ -811,9 +1316,30 @@ static const struct board_info __initdat
+ &board_96358vw2,
+ &board_AGPFS0,
+ &board_DWVS0,
++ &board_nb4_ser_r0,
++ &board_nb4_ser_r1,
++ &board_nb4_ser_r2,
++ &board_nb4_fxc_r1,
++ &board_nb4_fxc_r2,
+ #endif
+ };
+
++static void __init nb4_nvram_fixup(void)
++{
++ u8 *boot_addr, *p;
++ u32 val;
++
++ if (BCMCPU_IS_6358() && (!strcmp(nvram.name, "96358VW"))) {
++ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
++ val &= MPI_CSBASE_BASE_MASK;
++ boot_addr = (u8 *)KSEG1ADDR(val);
++ /* Extract nb4 PID */
++ p = boot_addr + NB4_PID_OFFSET;
++ if (!memcmp(p, "NB4-", 4))
++ memcpy(nvram.name, p, sizeof("NB4-XXX-rX"));
++ }
++}
++
+ /*
+ * Register a sane SPROMv2 to make the on-board
+ * bcm4318 WLAN work
+@@ -965,6 +1491,9 @@ void __init board_prom_init(void)
+ boardid_fixup(boot_addr);
+ }
+
++ /* Fixup broken nb4 board name */
++ nb4_nvram_fixup();
++
+ /* find board by name */
+ for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
+ if (strncmp(nvram.name, bcm963xx_boards[i]->name,
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -147,6 +147,38 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_96338w2_e7t = {
++ .name = "96338W2_E7T",
++ .expected_cpu_id = 0x6338,
++
++ .has_enet0 = 1,
++
++ .enet0 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .leds = {
++ {
++ .name = "ppp",
++ .gpio = 4,
++ .active_low = 1,
++ },
++ {
++ .name = "ppp-fail",
++ .gpio = 5,
++ .active_low = 1,
++ },
++ {
++ .name = "power",
++ .gpio = 0,
++ .active_low = 1,
++ .default_trigger = "default-on",
++
++ },
++ },
++};
+ #endif
+
+ /*
+@@ -1295,6 +1327,7 @@ static const struct board_info __initdat
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ &board_96338gw,
+ &board_96338w,
++ &board_96338w2_e7t,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ &board_96345gw2,
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -686,6 +686,98 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_CPVA642 = {
++ .name = "CPVA642",
++ .expected_cpu_id = 0x6358,
++
++ .has_uart0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .leds = {
++ /* bi-color */
++ {
++ .name = "power:red",
++ .gpio = 14,
++ .active_low = 1,
++ },
++ {
++ .name = "power:green",
++ .gpio = 11,
++ .active_low = 1,
++ .default_trigger = "default-on",
++ },
++ {
++ .name = "wifi:red",
++ .gpio = 6,
++ .active_low = 1,
++ },
++ {
++ .name = "wifi:green",
++ .gpio = 28,
++ .active_low = 0,
++ },
++ {
++ .name = "link:red",
++ .gpio = 9,
++ .active_low = 1,
++ },
++ {
++ .name = "link:green",
++ .gpio = 10,
++ .active_low = 1,
++ },
++ /* green only */
++ {
++ .name = "ether",
++ .gpio = 1,
++ .active_low = 1,
++ },
++ {
++ .name = "phone1",
++ .gpio = 4,
++ .active_low = 1,
++ },
++ {
++ .name = "phone2",
++ .gpio = 2,
++ .active_low = 1,
++ },
++ {
++ .name = "usb",
++ .gpio = 3,
++ .active_low = 1,
++ },
++ },
++
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 36,
++ .active_low = 1,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ {
++ .desc = "wps",
++ .gpio = 37,
++ .type = EV_KEY,
++ .code = KEY_WPS_BUTTON,
++ .threshold = 3,
++ },
++ },
++};
++
++
+ static struct board_info __initdata board_AGPFS0 = {
+ .name = "AGPF-S0",
+ .expected_cpu_id = 0x6358,
+@@ -1348,6 +1440,7 @@ static const struct board_info __initdat
+ &board_96358vw,
+ &board_96358vw2,
+ &board_AGPFS0,
++ &board_CPVA642,
+ &board_DWVS0,
+ &board_nb4_ser_r0,
+ &board_nb4_ser_r1,
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -915,6 +915,59 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ };
+
++/* D-Link DSL-274xB revison C2/C3 */
++static struct board_info __initdata board_dsl_274xb_rev_c = {
++ .name = "AW4139",
++ .expected_cpu_id = 0x6358,
++
++ .has_uart0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .leds = {
++ {
++ .name = "dsl-274xb:green:power",
++ .gpio = 5,
++ .active_low = 1,
++ .default_trigger = "default-on",
++ },
++ {
++ .name = "dsl-274xb:red:power",
++ .gpio = 4,
++ .active_low = 1,
++ },
++ {
++ .name = "dsl-274xb:green:adsl",
++ .gpio = 9,
++ .active_low = 1,
++ },
++ {
++ .name = "dsl-274xb:green:internet",
++ .gpio = 2,
++ },
++ {
++ .name = "dsl-274xb:red:internet",
++ .gpio = 10,
++ },
++ },
++
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 34,
++ .active_low = 1,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ },
++};
++
+ struct spi_gpio_platform_data nb4_spi_gpio_data = {
+ .sck = NB4_SPI_GPIO_CLK,
+ .mosi = NB4_SPI_GPIO_MOSI,
+@@ -1442,6 +1495,7 @@ static const struct board_info __initdat
+ &board_AGPFS0,
+ &board_CPVA642,
+ &board_DWVS0,
++ &board_dsl_274xb_rev_c,
+ &board_nb4_ser_r0,
+ &board_nb4_ser_r1,
+ &board_nb4_ser_r2,
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -580,6 +580,67 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_spw500v = {
++ .name = "SPW500V",
++ .expected_cpu_id = 0x6348,
++
++ .has_uart0 = 1,
++ .has_enet0 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .has_dsp = 1,
++ .dsp = {
++ .gpio_rst = 6,
++ .gpio_int = 34,
++ .ext_irq = 2,
++ .cs = 2,
++ },
++
++ .leds = {
++ {
++ .name = "power:red",
++ .gpio = 1,
++ .active_low = 1,
++ },
++ {
++ .name = "power:green",
++ .gpio = 0,
++ .active_low = 1,
++ .default_trigger = "default-on",
++ },
++ {
++ .name = "ppp",
++ .gpio = 3,
++ .active_low = 1,
++ },
++ { .name = "pstn",
++ .gpio = 28,
++ .active_low = 1,
++ },
++ {
++ .name = "voip",
++ .gpio = 32,
++ .active_low = 1,
++ },
++ },
++
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 33,
++ .active_low = 1,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ },
++};
++
+ #endif
+
+ /*
+@@ -1487,6 +1548,7 @@ static const struct board_info __initdat
+ &board_96348gw_a,
+ &board_rta1025w_16,
+ &board_96348_D4PW,
++ &board_spw500v,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -433,6 +433,112 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_gw6200 = {
++ .name = "GW6200",
++ .expected_cpu_id = 0x6348,
++
++ .has_uart0 = 1,
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++
++ .has_dsp = 1,
++ .dsp = {
++ .gpio_rst = 8, /* FIXME: What is real GPIO here? */
++ .gpio_int = 34,
++ .ext_irq = 2,
++ .cs = 2,
++ },
++
++ .leds = {
++ {
++ .name = "line1",
++ .gpio = 4,
++ .active_low = 1,
++ },
++ {
++ .name = "line2",
++ .gpio = 5,
++ .active_low = 1,
++ },
++ {
++ .name = "line3",
++ .gpio = 6,
++ .active_low = 1,
++ },
++ {
++ .name = "tel",
++ .gpio = 7,
++ .active_low = 1,
++ },
++ },
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 36,
++ .active_low = 1,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ },
++};
++
++static struct board_info __initdata board_gw6000 = {
++ .name = "GW6000",
++ .expected_cpu_id = 0x6348,
++
++ .has_uart0 = 1,
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++
++ .has_dsp = 1,
++ .dsp = {
++ .gpio_rst = 6,
++ .gpio_int = 34,
++ .ext_irq = 2,
++ .cs = 2,
++ },
++
++ /* GW6000 has no GPIO-controlled leds */
++
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 36,
++ .active_low = 1,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ },
++};
++
++
++
+ static struct board_info __initdata board_FAST2404 = {
+ .name = "F@ST2404",
+ .expected_cpu_id = 0x6348,
+@@ -1541,6 +1647,8 @@ static const struct board_info __initdat
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ &board_96348r,
+ &board_96348gw,
++ &board_gw6000,
++ &board_gw6200,
+ &board_96348gw_10,
+ &board_96348gw_11,
+ &board_FAST2404,
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -747,6 +747,76 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_96348sv = {
++ .name = "MAGIC",
++ .expected_cpu_id = 0x6348,
++
++ .has_uart0 = 1,
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++ .enet1 = {
++ /* is has BP_ENET_EXTERNAL_PHY */
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++
++ .has_dsp = 1,
++ .dsp = {
++ .gpio_rst = 25,
++ .gpio_int = 34,
++ .cs = 2,
++ .ext_irq = 2,
++ },
++
++ .leds = {
++ {
++ .name = "voip",
++ .gpio = 22,
++ .active_low = 1,
++ },
++ {
++ .name = "adsl",
++ .gpio = 5,
++ .active_low = 1,
++ },
++ {
++ .name = "wifi",
++ .gpio = 28,
++ },
++ {
++ .name = "usb",
++ .gpio = 35,
++ .active_low = 1,
++ },
++ {
++ .name = "hpna",
++ .gpio = 4,
++ .active_low = 1,
++ },
++ {
++ .name = "power",
++ .gpio = 0,
++ .active_low = 1,
++ .default_trigger = "default-on",
++ },
++ {
++ .name = "stop",
++ .gpio = 1,
++ .active_low = 1,
++ },
++ },
++};
++
+ #endif
+
+ /*
+@@ -1657,6 +1727,7 @@ static const struct board_info __initdat
+ &board_rta1025w_16,
+ &board_96348_D4PW,
+ &board_spw500v,
++ &board_96348sv,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1700,6 +1700,81 @@ static struct board_info __initdata boar
+ .spis = nb4_spi_devices,
+ .num_spis = ARRAY_SIZE(nb4_spi_devices),
+ };
++
++static struct board_info __initdata board_HW553 = {
++ .name = "HW553",
++ .expected_cpu_id = 0x6358,
++
++ .has_uart0 = 1,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .leds = {
++ /*Each led on HW553 is bi-color (except wifi) */
++ {
++ .name = "lan:red",
++ .gpio = 34,
++ .active_low = 1,
++ },
++ {
++ .name = "lan:blue",
++ .gpio = 35,
++ .active_low = 1,
++ },
++ {
++ .name = "adsl:red",
++ .gpio = 22,
++ .active_low = 1,
++ },
++ {
++ .name = "adsl:blue",
++ .gpio = 23,
++ .active_low = 1,
++ },
++ {
++ .name = "power:red",
++ .gpio = 5,
++ .active_low = 1,
++ .default_trigger = "default-on",
++ },
++
++ {
++ .name = "power:blue",
++ .gpio = 4,
++ .active_low = 1,
++ },
++ {
++ .name = "wifi:red",
++ .gpio = 25,
++ .active_low = 1,
++ },
++ {
++ .name = "internetkey:red",
++ .gpio = 12,
++ .active_low = 1,
++ },
++ {
++ .name = "internetkey:blue",
++ .gpio = 13,
++ .active_low = 1,
++ },
++ },
++};
+ #endif
+
+ /*
+@@ -1742,6 +1817,7 @@ static const struct board_info __initdat
+ &board_nb4_ser_r2,
+ &board_nb4_fxc_r1,
+ &board_nb4_fxc_r2,
++ &board_HW553,
+ #endif
+ };
+
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -179,6 +179,43 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_rta1320_16m = {
++ .name = "RTA1320_16M",
++ .expected_cpu_id = 0x6338,
++
++ .has_uart0 = 1,
++ .has_enet0 = 1,
++
++ .enet0 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .leds = {
++ {
++ .name = "adsl",
++ .gpio = 3,
++ .active_low = 1,
++ },
++ {
++ .name = "ppp",
++ .gpio = 4,
++ .active_low = 1,
++ },
++ {
++ .name = "power",
++ .gpio = 0,
++ .active_low = 1,
++ .default_trigger = "default-on",
++ },
++ {
++ .name = "stop",
++ .gpio = 1,
++ .active_low = 1,
++ },
++ },
++};
+ #endif
+
+ /*
+@@ -1785,6 +1822,7 @@ static const struct board_info __initdat
+ &board_96338gw,
+ &board_96338w,
+ &board_96338w2_e7t,
++ &board_rta1320_16m,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ &board_96345gw2,
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1812,6 +1812,72 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++ /* T-Home Speedport W 303V Typ B */
++static struct board_info __initdata board_spw303v = {
++ .name = "96358-502V",
++ .expected_cpu_id = 0x6358,
++
++ .has_uart0 = 1,
++ .has_enet0 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .leds = {
++ {
++ .name = "spw303v:green:power+adsl",
++ .gpio = 22,
++ .active_low = 1,
++ },
++ {
++ .name = "spw303v:red:power+adsl",
++ .gpio = 2,
++ .active_low = 1,
++ },
++ {
++ .name = "spw303v:green:ppp",
++ .gpio = 5,
++ .active_low = 1,
++ },
++ {
++ .name = "spw303v:green:ses",
++ .gpio = 0,
++ .active_low = 1,
++ },
++ {
++ .name = "spw303v:green:voip",
++ .gpio = 27,
++ .active_low = 1,
++ },
++ {
++ .name = "spw303v:green:pots",
++ .gpio = 31,
++ .active_low = 1,
++ },
++ },
++
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 11,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ {
++ .desc = "ses",
++ .gpio = 37,
++ .active_low = 1,
++ .type = EV_KEY,
++ .code = KEY_WPS_BUTTON,
++ .threshold = 3,
++ },
++ }
++};
+ #endif
+
+ /*
+@@ -1856,6 +1922,7 @@ static const struct board_info __initdat
+ &board_nb4_fxc_r1,
+ &board_nb4_fxc_r2,
+ &board_HW553,
++ &board_spw303v,
+ #endif
+ };
+
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -854,6 +854,63 @@ static struct board_info __initdata boar
+ },
+ };
+
++ static struct board_info __initdata board_V2500V_BB = {
++ .name = "V2500V_BB",
++ .expected_cpu_id = 0x6348,
++
++ .has_uart0 = 1,
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .leds = {
++ {
++ .name = "power:green",
++ .gpio = 0,
++ .active_low = 1,
++ .default_trigger = "default-on",
++ },
++ {
++ .name = "power:red",
++ .gpio = 1,
++ .active_low = 1,
++ },
++ {
++ .name = "adsl",
++ .gpio = 2,
++ .active_low = 1,
++ },
++ { .name = "ppp",
++ .gpio = 3,
++ .active_low = 1,
++ },
++ {
++ .name = "wireless",
++ .gpio = 6,
++ .active_low = 1,
++ },
++ },
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 31,
++ .active_low = 1,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ },
++};
++
+ #endif
+
+ /*
+@@ -1907,6 +1964,7 @@ static const struct board_info __initdat
+ &board_96348_D4PW,
+ &board_spw500v,
+ &board_96348sv,
++ &board_V2500V_BB,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -2060,6 +2118,22 @@ void __init board_prom_init(void)
+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+ val &= MPI_CSBASE_BASE_MASK;
+ boot_addr = (u8 *)KSEG1ADDR(val);
++ printk(KERN_INFO PFX "Boot address 0x%08x\n",(unsigned int)boot_addr);
++
++ /* BT Voyager 2500V (RTA1046VW PCB) has 8 Meg flash used as two */
++ /* banks of 4 Meg. The byte at 0xBF800000 identifies the back to use.*/
++ /* Loading firmware from the CFE Prompt always loads to Bank 0 */
++ /* Do an early check of CFE and then select bank 0 */
++
++ if (boot_addr == (u8 *)0xbf800000) {
++ u8 *tmp_boot_addr;
++ tmp_boot_addr = (u8 *)0xbfc00000; // Address of Bank 0
++ memcpy(&nvram, tmp_boot_addr + BCM963XX_NVRAM_OFFSET, sizeof(nvram));
++ if (!strcmp(nvram.name, "V2500V_BB")) {
++ printk(KERN_INFO PFX "V2500V: nvram bank 0\n");
++ boot_addr = (u8 *)0xbfc00000; // Bank 0
++ }
++ }
+
+ /* dump cfe version */
+ cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
+@@ -2261,6 +2335,13 @@ int __init board_register_devices(void)
+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+ val &= MPI_CSBASE_BASE_MASK;
+
++ /* BT Voyager 2500V has 8 Meg flash in two 4 Meg banks */
++ /* Loading from CFE always uses Bank 0 */
++ if (!strcmp(board.name, "V2500V_BB")) {
++ printk(KERN_INFO PFX "V2500V: Start in Bank 0\n");
++ val = val + 0x400000; // Select Bank 0 start address
++ }
++
+ mtd_resources[0].start = val;
+ mtd_resources[0].end = 0x1FFFFFFF;
+
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -402,6 +402,62 @@ static struct board_info __initdata boar
+ },
+ };
+
++
++/* BT Voyager 2110 */
++static struct board_info __initdata board_V2110 = {
++ .name = "V2110",
++ .expected_cpu_id = 0x6348,
++
++ .has_uart0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .leds = {
++ {
++ .name = "V2110:green:power",
++ .gpio = 0,
++ .active_low = 1,
++ .default_trigger = "default-on",
++ },
++ {
++ .name = "V2110:red:power",
++ .gpio = 1,
++ .active_low = 1,
++ },
++ {
++ .name = "V2110:green:adsl",
++ .gpio = 2,
++ .active_low = 1,
++ },
++ { .name = "V2110:green:ppp",
++ .gpio = 3,
++ .active_low = 1,
++ },
++ {
++ .name = "V2110:green:wireless",
++ .gpio = 6,
++ .active_low = 1,
++ },
++ },
++
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 33,
++ .active_low = 1,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ },
++};
++
++
+ static struct board_info __initdata board_96348gw = {
+ .name = "96348GW",
+ .expected_cpu_id = 0x6348,
+@@ -1965,6 +2021,7 @@ static const struct board_info __initdat
+ &board_spw500v,
+ &board_96348sv,
+ &board_V2500V_BB,
++ &board_V2110,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/Kconfig
++++ b/arch/mips/bcm63xx/boards/Kconfig
+@@ -8,4 +8,10 @@ config BOARD_BCM963XX
+ select SSB
+ help
+
++config BOARD_LIVEBOX
++ bool "Inventel Livebox(es) boards"
++ select SSB
++ help
++ Inventel Livebox boards using the RedBoot bootloader.
++
+ endchoice
+--- a/arch/mips/bcm63xx/boards/Makefile
++++ b/arch/mips/bcm63xx/boards/Makefile
+@@ -1,3 +1,4 @@
+ obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o
++obj-$(CONFIG_BOARD_LIVEBOX) += board_livebox.o
+
+ ccflags-y := -Werror
+--- /dev/null
++++ b/arch/mips/bcm63xx/boards/board_livebox.c
+@@ -0,0 +1,228 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/platform_device.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/mtd/physmap.h>
++#include <linux/input.h>
++#include <linux/gpio_buttons.h>
++#include <asm/addrspace.h>
++#include <bcm63xx_board.h>
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_dev_uart.h>
++#include <bcm63xx_dev_pci.h>
++#include <bcm63xx_dev_enet.h>
++#include <bcm63xx_dev_pcmcia.h>
++#include <bcm63xx_dev_usb_ohci.h>
++#include <bcm63xx_dev_usb_ehci.h>
++#include <board_bcm963xx.h>
++
++#define PFX "board_livebox: "
++
++static unsigned int mac_addr_used = 0;
++static struct board_info board;
++
++/*
++ * known 6348 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_6348
++static struct board_info __initdata board_livebox = {
++ .name = "Livebox",
++ .expected_cpu_id = 0x6348,
++
++ .has_uart0 = 1,
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++};
++#endif
++
++/*
++ * all boards
++ */
++static const struct board_info __initdata *bcm963xx_boards[] = {
++#ifdef CONFIG_BCM63XX_CPU_6348
++ &board_livebox
++#endif
++};
++
++/*
++ * early init callback
++ */
++void __init board_prom_init(void)
++{
++ u32 val;
++
++ /* read base address of boot chip select (0) */
++ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
++ val &= MPI_CSBASE_BASE_MASK;
++
++ /* assume board is a Livebox */
++ memcpy(&board, bcm963xx_boards[0], sizeof(board));
++
++ /* setup pin multiplexing depending on board enabled device,
++ * this has to be done this early since PCI init is done
++ * inside arch_initcall */
++ val = 0;
++
++ if (board.has_pci) {
++ bcm63xx_pci_enabled = 1;
++ if (BCMCPU_IS_6348())
++ val |= GPIO_MODE_6348_G2_PCI;
++ }
++
++ if (board.has_pccard) {
++ if (BCMCPU_IS_6348())
++ val |= GPIO_MODE_6348_G1_MII_PCCARD;
++ }
++
++ if (board.has_enet0 && !board.enet0.use_internal_phy) {
++ if (BCMCPU_IS_6348())
++ val |= GPIO_MODE_6348_G3_EXT_MII |
++ GPIO_MODE_6348_G0_EXT_MII;
++ }
++
++ if (board.has_enet1 && !board.enet1.use_internal_phy) {
++ if (BCMCPU_IS_6348())
++ val |= GPIO_MODE_6348_G3_EXT_MII |
++ GPIO_MODE_6348_G0_EXT_MII;
++ }
++
++ bcm_gpio_writel(val, GPIO_MODE_REG);
++}
++
++/*
++ * second stage init callback, good time to panic if we couldn't
++ * identify on which board we're running since early printk is working
++ */
++void __init board_setup(void)
++{
++ if (!board.name[0])
++ panic("unable to detect bcm963xx board");
++ printk(KERN_INFO PFX "board name: %s\n", board.name);
++
++ /* make sure we're running on expected cpu */
++ if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
++ panic("unexpected CPU for bcm963xx board");
++}
++
++/*
++ * return board name for /proc/cpuinfo
++ */
++const char *board_get_name(void)
++{
++ return board.name;
++}
++
++/*
++ * register & return a new board mac address
++ */
++
++static int board_get_mac_address(u8 *mac)
++{
++ u8 default_mac[ETH_ALEN] = {0x00, 0x07, 0x3A, 0x00, 0x00, 0x00};
++ u8 *p;
++ int count;
++
++ memcpy(mac, default_mac, ETH_ALEN);
++
++ p = mac + ETH_ALEN - 1;
++ count = mac_addr_used;
++
++ while (count--) {
++ do {
++ (*p)++;
++ if (*p != 0)
++ break;
++ p--;
++ } while (p != mac);
++ }
++
++ if (p == mac) {
++ printk(KERN_ERR PFX "unable to fetch mac address\n");
++ return -ENODEV;
++ }
++ mac_addr_used++;
++
++ return 0;
++}
++
++static struct resource mtd_resources[] = {
++ {
++ .start = 0, /* filled at runtime */
++ .end = 0, /* filled at runtime */
++ .flags = IORESOURCE_MEM,
++ }
++};
++
++static struct platform_device mtd_dev = {
++ .name = "bcm963xx-flash",
++ .resource = mtd_resources,
++ .num_resources = ARRAY_SIZE(mtd_resources),
++};
++
++
++/*
++ * third stage init callback, register all board devices.
++ */
++int __init board_register_devices(void)
++{
++ u32 val;
++
++ if (board.has_uart0)
++ bcm63xx_uart_register(0);
++
++ if (board.has_pccard)
++ bcm63xx_pcmcia_register();
++
++ if (board.has_enet0 &&
++ !board_get_mac_address(board.enet0.mac_addr))
++ bcm63xx_enet_register(0, &board.enet0);
++
++ if (board.has_enet1 &&
++ !board_get_mac_address(board.enet1.mac_addr))
++ bcm63xx_enet_register(1, &board.enet1);
++
++ if (board.has_ohci0)
++ bcm63xx_ohci_register();
++
++ if (board.has_ehci0)
++ bcm63xx_ehci_register();
++
++
++ /* read base address of boot chip select (0) */
++ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
++ val &= MPI_CSBASE_BASE_MASK;
++ mtd_resources[0].start = val;
++ mtd_resources[0].end = 0x1FFFFFFF;
++
++ platform_device_register(&mtd_dev);
++
++ return 0;
++}
++
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -458,6 +458,49 @@ static struct board_info __initdata boar
+ };
+
+
++static struct board_info __initdata board_ct536_ct5621 = {
++ .name = "CT536_CT5621",
++ .expected_cpu_id = 0x6348,
++
++ .has_uart0 = 1,
++ .has_enet0 = 0,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++
++ .leds = {
++ {
++ .name = "adsl-fail",
++ .gpio = 2,
++ .active_low = 1,
++ },
++ {
++ .name = "power",
++ .gpio = 0,
++ .active_low = 1,
++ .default_trigger = "default-on",
++ },
++ },
++ .buttons = {
++ {
++ .desc = "reset",
++ .gpio = 33,
++ .active_low = 1,
++ .type = EV_KEY,
++ .code = KEY_RESTART,
++ .threshold = 3,
++ },
++ },
++};
++
+ static struct board_info __initdata board_96348gw = {
+ .name = "96348GW",
+ .expected_cpu_id = 0x6348,
+@@ -2022,6 +2065,7 @@ static const struct board_info __initdat
+ &board_96348sv,
+ &board_V2500V_BB,
+ &board_V2110,
++ &board_ct536_ct5621,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1328,6 +1328,8 @@ static struct board_info __initdata boar
+ .name = "DWV-S0",
+ .expected_cpu_id = 0x6358,
+
++ .has_uart0 = 1,
++
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+@@ -1343,6 +1345,7 @@ static struct board_info __initdata boar
+ },
+
+ .has_ohci0 = 1,
++ .has_ehci0 = 1,
+ };
+
+ /* D-Link DSL-274xB revison C2/C3 */
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -2109,7 +2109,7 @@ static void __init nb4_nvram_fixup(void)
+ * bcm4318 WLAN work
+ */
+ #ifdef CONFIG_SSB_PCIHOST
+-static struct ssb_sprom bcm63xx_sprom = {
++struct ssb_sprom bcm63xx_sprom = {
+ .revision = 0x02,
+ .board_rev = 0x17,
+ .country_code = 0x0,
+@@ -2129,6 +2129,7 @@ static struct ssb_sprom bcm63xx_sprom =
+ .boardflags_lo = 0x2848,
+ .boardflags_hi = 0x0000,
+ };
++EXPORT_SYMBOL(bcm63xx_sprom);
+
+ int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+ {
projects / openwrt / staging / blocktrron.git / commitdiff