drm/i915/guc: Reset GuC ADS during sanitize

GuC stores some data in there, which might be stale after a reset.
Reinitialize whole ADS in case any part of it was corrupted during
previous GuC run.

v2: s/reinit/init, update functions descriptions (Tomek/Michal)
v3: reset ADS right before fw upload

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: MichaĹ Winiarski <michal.winiarski@intel.com>
Cc: Tomasz Lis <tomasz.lis@intel.com>
Reviewed-by: Tomasz Lis <tomasz.lis@intel.com> #v2
Reviewed-by: MichaĹ Winiarski <michal.winiarski@intel.com> #v2
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190527183613.17076-5-michal.wajdeczko@intel.com

diff --git a/drivers/gpu/drm/i915/intel_guc_ads.c b/drivers/gpu/drm/i915/intel_guc_ads.c
index 1aa1ec0ff4a186dd04bdd31631bba18016e6d53c..ecb69fc942185b831de2b22cab7bc36abfd83542 100644 (file)
--- a/drivers/gpu/drm/i915/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/intel_guc_ads.c
@@ -72,43 +72,28 @@ static void guc_ct_pool_entries_init(struct guc_ct_pool_entry *pool, u32 num)
  */
 #define LR_HW_CONTEXT_SIZE     (80 * sizeof(u32))
 
-/**
- * intel_guc_ads_create() - creates GuC ADS
- * @guc: intel_guc struct
- *
- */
-int intel_guc_ads_create(struct intel_guc *guc)
+/* The ads obj includes the struct itself and buffers passed to GuC */
+struct __guc_ads_blob {
+       struct guc_ads ads;
+       struct guc_policies policies;
+       struct guc_mmio_reg_state reg_state;
+       struct guc_gt_system_info system_info;
+       struct guc_clients_info clients_info;
+       struct guc_ct_pool_entry ct_pool[GUC_CT_POOL_SIZE];
+       u8 reg_state_buffer[GUC_S3_SAVE_SPACE_PAGES * PAGE_SIZE];
+} __packed;
+
+static int __guc_ads_init(struct intel_guc *guc)
 {
        struct drm_i915_private *dev_priv = guc_to_i915(guc);
-       struct i915_vma *vma;
-       /* The ads obj includes the struct itself and buffers passed to GuC */
-       struct {
-               struct guc_ads ads;
-               struct guc_policies policies;
-               struct guc_mmio_reg_state reg_state;
-               struct guc_gt_system_info system_info;
-               struct guc_clients_info clients_info;
-               struct guc_ct_pool_entry ct_pool[GUC_CT_POOL_SIZE];
-               u8 reg_state_buffer[GUC_S3_SAVE_SPACE_PAGES * PAGE_SIZE];
-       } __packed *blob;
+       struct __guc_ads_blob *blob;
        const u32 skipped_size = LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SIZE;
        u32 base;
        u8 engine_class;
-       int ret;
-
-       GEM_BUG_ON(guc->ads_vma);
-
-       vma = intel_guc_allocate_vma(guc, PAGE_ALIGN(sizeof(*blob)));
-       if (IS_ERR(vma))
-               return PTR_ERR(vma);
-
-       guc->ads_vma = vma;
 
        blob = i915_gem_object_pin_map(guc->ads_vma->obj, I915_MAP_WB);
-       if (IS_ERR(blob)) {
-               ret = PTR_ERR(blob);
-               goto err_vma;
-       }
+       if (IS_ERR(blob))
+               return PTR_ERR(blob);
 
        /* GuC scheduling policies */
        guc_policies_init(&blob->policies);
@@ -143,7 +128,7 @@ int intel_guc_ads_create(struct intel_guc *guc)
        blob->system_info.vebox_enable_mask = VEBOX_MASK(dev_priv);
        blob->system_info.vdbox_sfc_support_mask = RUNTIME_INFO(dev_priv)->vdbox_sfc_access;
 
-       base = intel_guc_ggtt_offset(guc, vma);
+       base = intel_guc_ggtt_offset(guc, guc->ads_vma);
 
        /* Clients info  */
        guc_ct_pool_entries_init(blob->ct_pool, ARRAY_SIZE(blob->ct_pool));
@@ -162,6 +147,34 @@ int intel_guc_ads_create(struct intel_guc *guc)
        i915_gem_object_unpin_map(guc->ads_vma->obj);
 
        return 0;
+}
+
+/**
+ * intel_guc_ads_create() - allocates and initializes GuC ADS.
+ * @guc: intel_guc struct
+ *
+ * GuC needs memory block (Additional Data Struct), where it will store
+ * some data. Allocate and initialize such memory block for GuC use.
+ */
+int intel_guc_ads_create(struct intel_guc *guc)
+{
+       const u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
+       struct i915_vma *vma;
+       int ret;
+
+       GEM_BUG_ON(guc->ads_vma);
+
+       vma = intel_guc_allocate_vma(guc, size);
+       if (IS_ERR(vma))
+               return PTR_ERR(vma);
+
+       guc->ads_vma = vma;
+
+       ret = __guc_ads_init(guc);
+       if (ret)
+               goto err_vma;
+
+       return 0;
 
 err_vma:
        i915_vma_unpin_and_release(&guc->ads_vma, 0);
@@ -172,3 +185,18 @@ void intel_guc_ads_destroy(struct intel_guc *guc)
 {
        i915_vma_unpin_and_release(&guc->ads_vma, 0);
 }
+
+/**
+ * intel_guc_ads_reset() - prepares GuC Additional Data Struct for reuse
+ * @guc: intel_guc struct
+ *
+ * GuC stores some data in ADS, which might be stale after a reset.
+ * Reinitialize whole ADS in case any part of it was corrupted during
+ * previous GuC run.
+ */
+void intel_guc_ads_reset(struct intel_guc *guc)
+{
+       if (!guc->ads_vma)
+               return;
+       __guc_ads_init(guc);
+}

diff --git a/drivers/gpu/drm/i915/intel_guc_ads.h b/drivers/gpu/drm/i915/intel_guc_ads.h
index c4735742c5645d11142b9702fd608077b1cabf21..7f40f9cd5fb9de931197cc45ecb2fb2d06b5b151 100644 (file)
--- a/drivers/gpu/drm/i915/intel_guc_ads.h
+++ b/drivers/gpu/drm/i915/intel_guc_ads.h
@@ -29,5 +29,6 @@ struct intel_guc;
 
 int intel_guc_ads_create(struct intel_guc *guc);
 void intel_guc_ads_destroy(struct intel_guc *guc);
+void intel_guc_ads_reset(struct intel_guc *guc);
 
 #endif

diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 75943ea4e65d3a5e36661ae878aa9e58c188a964..082036164c0cbf782c1752099c8a4640b1f38cde 100644 (file)
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -24,8 +24,9 @@
 
 #include "gt/intel_reset.h"
 #include "intel_uc.h"
-#include "intel_guc_submission.h"
 #include "intel_guc.h"
+#include "intel_guc_ads.h"
+#include "intel_guc_submission.h"
 #include "i915_drv.h"
 
 static void guc_free_load_err_log(struct intel_guc *guc);
@@ -414,6 +415,7 @@ int intel_uc_init_hw(struct drm_i915_private *i915)
                                goto err_out;
                }
 
+               intel_guc_ads_reset(guc);
                intel_guc_init_params(guc);
                ret = intel_guc_fw_upload(guc);
                if (ret == 0)