drm/msm/mdp5: Add pingpong entry to mdp5 config table

Pingpong register base addresses are different across platforms.
This change adds this information to config table and initialize
the values for 8x74 and 8084.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c
index baf4c95e7d921b11878039fec434079cc243f138..57d620b4024041a91b3b3d8f20067475a031d9d5 100644 (file)
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c
@@ -58,6 +58,10 @@ const struct mdp5_cfg_hw msm8x74_config = {
                .count = 2,
                .base = { 0x13100, 0x13300 }, /* NOTE: no ad in v1.0 */
        },
+       .pp = {
+               .count = 3,
+               .base = { 0x12d00, 0x12e00, 0x12f00 },
+       },
        .intf = {
                .count = 4,
                .base = { 0x12500, 0x12700, 0x12900, 0x12b00 },
@@ -111,6 +115,10 @@ const struct mdp5_cfg_hw apq8084_config = {
                .count = 3,
                .base = { 0x13500, 0x13700, 0x13900 },
        },
+       .pp = {
+               .count = 4,
+               .base = { 0x12f00, 0x13000, 0x13100, 0x13200 },
+       },
        .intf = {
                .count = 5,
                .base = { 0x12500, 0x12700, 0x12900, 0x12b00, 0x12d00 },

diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
index 12224d777e7bcf567091de4ef59e73b9f6923698..93bee92e7d6034e8a98420d1502852efe3542c14 100644 (file)
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
@@ -69,6 +69,7 @@ struct mdp5_cfg_hw {
        struct mdp5_lm_block  lm;
        struct mdp5_sub_block dspp;
        struct mdp5_sub_block ad;
+       struct mdp5_sub_block pp;
        struct mdp5_sub_block intf;
 
        u32 intfs[MDP5_INTF_NUM_MAX]; /* array of enum mdp5_intf_type */