ams_delta_mtd = nand_to_mtd(this);
ams_delta_mtd->owner = THIS_MODULE;
- /* Link the private data with the MTD structure */
- ams_delta_mtd->priv = this;
-
/*
* Don't try to request the memory region from here,
* it should have been already requested from the
}
nand_chip->priv = host; /* link the private data structures */
- mtd->priv = nand_chip;
mtd->dev.parent = &pdev->dev;
/* Set address of NAND IO lines */
this = &ctx->chip;
mtd = nand_to_mtd(this);
- mtd->priv = this;
mtd->dev.parent = &pdev->dev;
/* figure out which CS# r->start belongs to */
b47n->nand_chip.priv = b47n;
mtd = nand_to_mtd(&b47n->nand_chip);
mtd->dev.parent = &pdev->dev;
- mtd->priv = &b47n->nand_chip; /* Required */
b47n->cc = container_of(nflash, struct bcma_drv_cc, nflash);
if (b47n->cc->core->bus->chipinfo.id == BCMA_CHIP_ID_BCM4706) {
chip->chip_delay = 0;
/* initialise mtd info data struct */
- mtd->priv = chip;
mtd->dev.parent = &pdev->dev;
/* initialise the hardware */
nand_set_flash_node(chip, dn);
chip->priv = host;
- mtd->priv = chip;
mtd->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "brcmnand.%d",
host->cs);
mtd->owner = THIS_MODULE;
mtd = nand_to_mtd(&cafe->nand);
mtd->dev.parent = &pdev->dev;
- mtd->priv = &cafe->nand;
cafe->nand.priv = cafe;
cafe->pdev = pdev;
/* Link the private data with the MTD structure */
cmx270_nand_mtd->owner = THIS_MODULE;
- cmx270_nand_mtd->priv = this;
/* insert callbacks */
this->IO_ADDR_R = cmx270_nand_io;
new_mtd = nand_to_mtd(this);
/* Link the private data with the MTD structure */
- new_mtd->priv = this;
new_mtd->owner = THIS_MODULE;
/* map physical address */
info->vaddr = vaddr;
mtd = nand_to_mtd(&info->chip);
- mtd->priv = &info->chip;
mtd->dev.parent = &pdev->dev;
nand_set_flash_node(&info->chip, pdev->dev.of_node);
/* now that our ISR is registered, we can enable interrupts */
denali_set_intr_modes(denali, true);
mtd->name = "denali-nand";
- mtd->priv = &denali->nand;
/* register the driver with the NAND core subsystem */
denali->nand.select_chip = denali_select_chip;
nand->bbt_td = (struct nand_bbt_descr *) (doc + 1);
nand->bbt_md = nand->bbt_td + 1;
- mtd->priv = nand;
mtd->owner = THIS_MODULE;
nand->priv = doc;
mtd = nand_to_mtd(nand);
doc = (struct docg4_priv *) (nand + 1);
- mtd->priv = nand;
nand->priv = doc;
mtd->dev.parent = &pdev->dev;
doc->virtadr = virtadr;
dev_dbg(priv->dev, "eLBC Set Information for bank %d\n", priv->bank);
/* Fill in fsl_elbc_mtd structure */
- mtd->priv = chip;
mtd->dev.parent = priv->dev;
nand_set_flash_node(chip, priv->dev->of_node);
u32 csor;
/* Fill in fsl_ifc_mtd structure */
- mtd->priv = chip;
mtd->dev.parent = priv->dev;
nand_set_flash_node(chip, priv->dev->of_node);
if (fun->rnb_gpio[0] >= 0)
fun->chip.dev_ready = fun_chip_ready;
- mtd->priv = &fun->chip;
mtd->dev.parent = fun->dev;
flash_np = of_get_next_child(upm_np, NULL);
/* Link all private pointers */
mtd = nand_to_mtd(&host->nand);
nand = &host->nand;
- mtd->priv = nand;
nand->priv = host;
nand_set_flash_node(nand, np);
chip->cmd_ctrl = gpio_nand_cmd_ctrl;
mtd = nand_to_mtd(chip);
- mtd->priv = chip;
mtd->dev.parent = &pdev->dev;
platform_set_drvdata(pdev, gpiomtd);
this->current_chip = -1;
/* init the MTD data structures */
- mtd->priv = chip;
mtd->name = "gpmi-nand";
mtd->dev.parent = this->dev;
goto err_res;
}
- mtd->priv = chip;
mtd->name = "hisi_nand";
mtd->dev.parent = &pdev->dev;
chip = &nand->chip;
mtd = nand_to_mtd(chip);
- mtd->priv = chip;
mtd->dev.parent = &pdev->dev;
mtd->name = "jz4740-nand";
nand_chip->priv = host; /* link the private data structures */
nand_set_flash_node(nand_chip, pdev->dev.of_node);
- mtd->priv = nand_chip;
mtd->dev.parent = &pdev->dev;
/* Get NAND clock */
mtd = nand_to_mtd(chip);
chip->priv = host;
nand_set_flash_node(chip, pdev->dev.of_node);
- mtd->priv = chip;
mtd->owner = THIS_MODULE;
mtd->dev.parent = &pdev->dev;
chip = &prv->chip;
mtd = nand_to_mtd(chip);
- mtd->priv = chip;
mtd->dev.parent = dev;
chip->priv = prv;
nand_set_flash_node(chip, dn);
/* structures must be linked */
this = &host->nand;
mtd = nand_to_mtd(this);
- mtd->priv = this;
mtd->dev.parent = &pdev->dev;
mtd->name = DRIVER_NAME;
return -ENOMEM;
}
nsmtd = nand_to_mtd(chip);
- nsmtd->priv = (void *)chip;
nand = (struct nandsim *)(chip + 1);
chip->priv = (void *)nand;
chip->ecc.strength = 1;
chip->priv = ndfc;
- mtd->priv = chip;
mtd->dev.parent = &ndfc->ofdev->dev;
flash_np = of_get_next_child(node, NULL);
chip = &(nuc900_nand->chip);
mtd = nand_to_mtd(chip);
- mtd->priv = chip;
mtd->dev.parent = &pdev->dev;
spin_lock_init(&nuc900_nand->lock);
info->ecc_opt = pdata->ecc_opt;
nand_chip = &info->nand;
mtd = nand_to_mtd(nand_chip);
- mtd->priv = &info->nand;
mtd->dev.parent = &pdev->dev;
nand_chip->ecc.priv = NULL;
nand_set_flash_node(nand_chip, pdata->of_node);
board = dev_get_platdata(&pdev->dev);
}
- mtd->priv = nc;
mtd->dev.parent = &pdev->dev;
nc->priv = board;
pasemi_nand_mtd = nand_to_mtd(chip);
/* Link the private data with the MTD structure */
- pasemi_nand_mtd->priv = chip;
pasemi_nand_mtd->dev.parent = &ofdev->dev;
chip->IO_ADDR_R = of_iomap(np, 0);
data->chip.priv = &data;
nand_set_flash_node(&data->chip, pdev->dev.of_node);
mtd = nand_to_mtd(&data->chip);
- mtd->priv = &data->chip;
mtd->dev.parent = &pdev->dev;
data->chip.IO_ADDR_R = data->io_base;
info->host[cs] = host;
host->cs = cs;
host->info_data = info;
- mtd->priv = chip;
mtd->dev.parent = &pdev->dev;
/* FIXME: all chips use the same device tree partitions */
nand_set_flash_node(chip, np);
WARN_ON(dev->card_registred);
- mtd->priv = dev->chip;
mtd->dev.parent = &dev->pci_dev->dev;
if (dev->readonly)
struct s3c2410_nand_set *set)
{
struct nand_chip *chip = &nmtd->chip;
- struct mtd_info *mtd = nand_to_mtd(chip);
void __iomem *regs = info->regs;
chip->write_buf = s3c2410_nand_write_buf;
chip->IO_ADDR_R = chip->IO_ADDR_W;
nmtd->info = info;
- mtd->priv = chip;
nmtd->set = set;
#ifdef CONFIG_MTD_NAND_S3C2410_HWECC
nand = &flctl->chip;
flctl_mtd = nand_to_mtd(nand);
nand_set_flash_node(nand, pdev->dev.of_node);
- flctl_mtd->priv = nand;
flctl_mtd->dev.parent = &pdev->dev;
flctl->pdev = pdev;
flctl->hwecc = pdata->has_hwecc;
/* Link the private data with the MTD structure */
mtd = nand_to_mtd(this);
- mtd->priv = this;
mtd->dev.parent = &pdev->dev;
platform_set_drvdata(pdev, sharpsl);
nand_chip->priv = host; /* link the private data structures */
nand_set_flash_node(nand_chip, ofdev->dev.of_node);
- mtd->priv = nand_chip;
mtd->name = "socrates_nand";
mtd->dev.parent = &ofdev->dev;
mtd = nand_to_mtd(nand);
mtd->dev.parent = dev;
- mtd->priv = nand;
ret = nand_scan_ident(mtd, nsels, NULL);
if (ret)
platform_set_drvdata(dev, tmio);
nand_chip = &tmio->chip;
mtd = nand_to_mtd(nand_chip);
- mtd->priv = nand_chip;
mtd->name = "tmio-nand";
mtd->dev.parent = &dev->dev;
mtd = nand_to_mtd(chip);
mtd->dev.parent = &dev->dev;
- mtd->priv = chip;
-
chip->read_byte = txx9ndfmc_read_byte;
chip->read_buf = txx9ndfmc_read_buf;
chip->write_buf = txx9ndfmc_write_buf;
chip = &nfc->chip;
mtd = nand_to_mtd(chip);
- mtd->priv = chip;
mtd->owner = THIS_MODULE;
mtd->dev.parent = nfc->dev;
mtd->name = DRV_NAME;
projects / openwrt / staging / blogic.git / commitdiff