#else /* CONFIG_SOC_DA8XX */
-enum davinci_lpsc_ids {
- DAVINCI_LPSC_TPCC = 0,
- DAVINCI_LPSC_TPTC0,
- DAVINCI_LPSC_TPTC1,
- DAVINCI_LPSC_AEMIF,
- DAVINCI_LPSC_SPI0,
- DAVINCI_LPSC_MMC_SD,
- DAVINCI_LPSC_AINTC,
- DAVINCI_LPSC_ARM_RAM_ROM,
- DAVINCI_LPSC_SECCTL_KEYMGR,
- DAVINCI_LPSC_UART0,
- DAVINCI_LPSC_SCR0,
- DAVINCI_LPSC_SCR1,
- DAVINCI_LPSC_SCR2,
- DAVINCI_LPSC_DMAX,
- DAVINCI_LPSC_ARM,
- DAVINCI_LPSC_GEM,
- /* for LPSCs in PSC1, offset from 32 for differentiation */
- DAVINCI_LPSC_PSC1_BASE = 32,
- DAVINCI_LPSC_USB11,
- DAVINCI_LPSC_USB20,
- DAVINCI_LPSC_GPIO,
- DAVINCI_LPSC_UHPI,
- DAVINCI_LPSC_EMAC,
- DAVINCI_LPSC_DDR_EMIF,
- DAVINCI_LPSC_McASP0,
- DAVINCI_LPSC_McASP1,
- DAVINCI_LPSC_McASP2,
- DAVINCI_LPSC_SPI1,
- DAVINCI_LPSC_I2C1,
- DAVINCI_LPSC_UART1,
- DAVINCI_LPSC_UART2,
- DAVINCI_LPSC_LCDC,
- DAVINCI_LPSC_ePWM,
- DAVINCI_LPSC_eCAP,
- DAVINCI_LPSC_eQEP,
- DAVINCI_LPSC_SCR_P0,
- DAVINCI_LPSC_SCR_P1,
- DAVINCI_LPSC_CR_P3,
- DAVINCI_LPSC_L3_CBA_RAM
-};
+#define DAVINCI_LPSC_TPCC 0
+#define DAVINCI_LPSC_TPTC0 1
+#define DAVINCI_LPSC_TPTC1 2
+#define DAVINCI_LPSC_AEMIF 3
+#define DAVINCI_LPSC_SPI0 4
+#define DAVINCI_LPSC_MMC_SD 5
+#define DAVINCI_LPSC_AINTC 6
+#define DAVINCI_LPSC_ARM_RAM_ROM 7
+#define DAVINCI_LPSC_SECCTL_KEYMGR 8
+#define DAVINCI_LPSC_UART0 9
+#define DAVINCI_LPSC_SCR0 10
+#define DAVINCI_LPSC_SCR1 11
+#define DAVINCI_LPSC_SCR2 12
+#define DAVINCI_LPSC_DMAX 13
+#define DAVINCI_LPSC_ARM 14
+#define DAVINCI_LPSC_GEM 15
+
+/* for LPSCs in PSC1, offset from 32 for differentiation */
+#define DAVINCI_LPSC_PSC1_BASE 32
+#define DAVINCI_LPSC_USB11 (DAVINCI_LPSC_PSC1_BASE + 1)
+#define DAVINCI_LPSC_USB20 (DAVINCI_LPSC_PSC1_BASE + 2)
+#define DAVINCI_LPSC_GPIO (DAVINCI_LPSC_PSC1_BASE + 3)
+#define DAVINCI_LPSC_UHPI (DAVINCI_LPSC_PSC1_BASE + 4)
+#define DAVINCI_LPSC_EMAC (DAVINCI_LPSC_PSC1_BASE + 5)
+#define DAVINCI_LPSC_DDR_EMIF (DAVINCI_LPSC_PSC1_BASE + 6)
+#define DAVINCI_LPSC_McASP0 (DAVINCI_LPSC_PSC1_BASE + 7)
+#define DAVINCI_LPSC_McASP1 (DAVINCI_LPSC_PSC1_BASE + 8)
+#define DAVINCI_LPSC_McASP2 (DAVINCI_LPSC_PSC1_BASE + 9)
+#define DAVINCI_LPSC_SPI1 (DAVINCI_LPSC_PSC1_BASE + 10)
+#define DAVINCI_LPSC_I2C1 (DAVINCI_LPSC_PSC1_BASE + 11)
+#define DAVINCI_LPSC_UART1 (DAVINCI_LPSC_PSC1_BASE + 12)
+#define DAVINCI_LPSC_UART2 (DAVINCI_LPSC_PSC1_BASE + 13)
+#define DAVINCI_LPSC_LCDC (DAVINCI_LPSC_PSC1_BASE + 14)
+#define DAVINCI_LPSC_ePWM (DAVINCI_LPSC_PSC1_BASE + 15)
+#define DAVINCI_LPSC_eCAP (DAVINCI_LPSC_PSC1_BASE + 16)
+#define DAVINCI_LPSC_eQEP (DAVINCI_LPSC_PSC1_BASE + 17)
+#define DAVINCI_LPSC_SCR_P0 (DAVINCI_LPSC_PSC1_BASE + 18)
+#define DAVINCI_LPSC_SCR_P1 (DAVINCI_LPSC_PSC1_BASE + 19)
+#define DAVINCI_LPSC_CR_P3 (DAVINCI_LPSC_PSC1_BASE + 20)
+#define DAVINCI_LPSC_L3_CBA_RAM (DAVINCI_LPSC_PSC1_BASE + 21)
#endif /* CONFIG_SOC_DA8XX */