#define CPU_FTR_REAL_LE LONG_ASM_CONST(0x0000000000001000)
#define CPU_FTR_HVMODE LONG_ASM_CONST(0x0000000000002000)
-#define CPU_FTR_ARCH_201 LONG_ASM_CONST(0x0000000000004000)
#define CPU_FTR_ARCH_206 LONG_ASM_CONST(0x0000000000008000)
#define CPU_FTR_ARCH_207S LONG_ASM_CONST(0x0000000000010000)
#define CPU_FTR_ARCH_300 LONG_ASM_CONST(0x0000000000020000)
CPU_FTR_MMCRA | CPU_FTR_CP_USE_DCBTZ | \
CPU_FTR_STCX_CHECKS_ADDRESS)
#define CPU_FTRS_PPC970 (CPU_FTR_LWSYNC | \
- CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_ARCH_201 | \
+ CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA | \
CPU_FTR_CP_USE_DCBTZ | CPU_FTR_STCX_CHECKS_ADDRESS | \
CPU_FTR_HVMODE | CPU_FTR_DABRX)