drm/nv50: Remove redundant/incorrect ctxvals initialisation.

11c/004 offset corresponds to PGRAPH reg 0x400828, and is initialised
earlier anyway by both our ctxprog generator and blob ctxvals. It's
actually incorrect with the generator, since we use different layout
on pre-NVA0.

Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c
index 857a09671a394c80a534d350b659261d8f56c223..08d87b749a52471ce66ffe1b2da77b01f4d1faaa 100644 (file)
--- a/drivers/gpu/drm/nouveau/nv50_graph.c
+++ b/drivers/gpu/drm/nouveau/nv50_graph.c
@@ -229,10 +229,6 @@ nv50_graph_create_context(struct nouveau_channel *chan)
                nouveau_grctx_vals_load(dev, ctx);
        }
        nv_wo32(dev, ctx, 0x00000/4, chan->ramin->instance >> 12);
-       if ((dev_priv->chipset & 0xf0) == 0xa0)
-               nv_wo32(dev, ctx, 0x00004/4, 0x00000000);
-       else
-               nv_wo32(dev, ctx, 0x0011c/4, 0x00000000);
        dev_priv->engine.instmem.finish_access(dev);
 
        return 0;