extern int radeon_uvd;
extern int radeon_vce;
+#ifdef CONFIG_DRM_AMDGPU_SI
+extern int radeon_si_support;
+#endif
#ifdef CONFIG_DRM_AMDGPU_CIK
extern int radeon_cik_support;
#endif
MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)");
module_param_named(vce, radeon_vce, int, 0444);
+#ifdef CONFIG_DRM_AMDGPU_SI
+int radeon_si_support = 1;
+MODULE_PARM_DESC(si_support, "SI support (1 = enabled (default), 0 = disabled)");
+module_param_named(si_support, radeon_si_support, int, 0444);
+#endif
+
#ifdef CONFIG_DRM_AMDGPU_CIK
int radeon_cik_support = 0;
MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled, 0 = disabled (default))");
struct radeon_device *rdev;
int r, acpi_status;
+#ifdef CONFIG_DRM_AMDGPU_SI
+ if (!radeon_si_support) {
+ switch (flags & RADEON_FAMILY_MASK) {
+ case CHIP_TAHITI:
+ case CHIP_PITCAIRN:
+ case CHIP_VERDE:
+ case CHIP_OLAND:
+ case CHIP_HAINAN:
+ dev_info(dev->dev,
+ "SI support disabled by module param\n");
+ return -ENODEV;
+ }
+ }
+#endif
#ifdef CONFIG_DRM_AMDGPU_CIK
if (!radeon_cik_support) {
switch (flags & RADEON_FAMILY_MASK) {