drm/radeon: check if pcie gen 2 is already enabled (v2)
authorAlex Deucher <alexander.deucher@amd.com>
Mon, 8 Oct 2012 21:46:27 +0000 (17:46 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 15 Oct 2012 17:21:02 +0000 (13:21 -0400)
If so, skip enabling it to save time.

v2: coding style fixes

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/evergreen.c
drivers/gpu/drm/radeon/r600.c

index a1f49c5fd74b2ce287f0fe2786434853779fa033..14313ad43b7680f28b322b913997cf653242bb07 100644 (file)
@@ -3431,9 +3431,14 @@ void evergreen_pcie_gen2_enable(struct radeon_device *rdev)
        if (!(mask & DRM_PCIE_SPEED_50))
                return;
 
+       speed_cntl = RREG32_PCIE_P(PCIE_LC_SPEED_CNTL);
+       if (speed_cntl & LC_CURRENT_DATA_RATE) {
+               DRM_INFO("PCIE gen 2 link speeds already enabled\n");
+               return;
+       }
+
        DRM_INFO("enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0\n");
 
-       speed_cntl = RREG32_PCIE_P(PCIE_LC_SPEED_CNTL);
        if ((speed_cntl & LC_OTHER_SIDE_EVER_SENT_GEN2) ||
            (speed_cntl & LC_OTHER_SIDE_SUPPORTS_GEN2)) {
 
index 70c800ff61901ba6a30d0e714491cc9ccc190d3b..cda280d157da95725b414f54ebcc5cce9f78b7fc 100644 (file)
@@ -3703,6 +3703,12 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev)
        if (!(mask & DRM_PCIE_SPEED_50))
                return;
 
+       speed_cntl = RREG32_PCIE_P(PCIE_LC_SPEED_CNTL);
+       if (speed_cntl & LC_CURRENT_DATA_RATE) {
+               DRM_INFO("PCIE gen 2 link speeds already enabled\n");
+               return;
+       }
+
        DRM_INFO("enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0\n");
 
        /* 55 nm r6xx asics */