irqchip: mips-gic: Convert remaining shared reg access to new accessors

Convert the remaining accesses to registers in the GIC shared register
block to use the new accessor functions provided by asm/mips-gic.h,
resulting in code which is often shorter & easier to read.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17034/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index d9851cbb2a6bd081652ca8df6b744e85ab1236a1..a906284215b7d989c8995c57acbf5e7788b9de9c 100644 (file)
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -119,7 +119,7 @@ static void gic_send_ipi(struct irq_data *d, unsigned int cpu)
 {
        irq_hw_number_t hwirq = GIC_HWIRQ_TO_SHARED(irqd_to_hwirq(d));
 
-       gic_write(GIC_REG(SHARED, GIC_SH_WEDGE), GIC_SH_WEDGE_SET(hwirq));
+       write_gic_wedge(GIC_WEDGE_RW | hwirq);
 }
 
 int gic_get_c0_compare_int(void)
@@ -215,7 +215,7 @@ static void gic_ack_irq(struct irq_data *d)
 {
        unsigned int irq = GIC_HWIRQ_TO_SHARED(d->hwirq);
 
-       gic_write(GIC_REG(SHARED, GIC_SH_WEDGE), GIC_SH_WEDGE_CLR(irq));
+       write_gic_wedge(irq);
 }
 
 static int gic_set_type(struct irq_data *d, unsigned int type)
@@ -700,13 +700,13 @@ static void __init __gic_init(unsigned long gic_base_addr,
 
        mips_gic_base = ioremap_nocache(gic_base_addr, gic_addrspace_size);
 
-       gicconfig = gic_read(GIC_REG(SHARED, GIC_SH_CONFIG));
-       gic_shared_intrs = (gicconfig & GIC_SH_CONFIG_NUMINTRS_MSK) >>
-                  GIC_SH_CONFIG_NUMINTRS_SHF;
-       gic_shared_intrs = ((gic_shared_intrs + 1) * 8);
+       gicconfig = read_gic_config();
+       gic_shared_intrs = gicconfig & GIC_CONFIG_NUMINTERRUPTS;
+       gic_shared_intrs >>= __fls(GIC_CONFIG_NUMINTERRUPTS);
+       gic_shared_intrs = (gic_shared_intrs + 1) * 8;
 
-       gic_vpes = (gicconfig & GIC_SH_CONFIG_NUMVPES_MSK) >>
-                 GIC_SH_CONFIG_NUMVPES_SHF;
+       gic_vpes = gicconfig & GIC_CONFIG_PVPS;
+       gic_vpes >>= __fls(GIC_CONFIG_PVPS);
        gic_vpes = gic_vpes + 1;
 
        if (cpu_has_veic) {

diff --git a/include/linux/irqchip/mips-gic.h b/include/linux/irqchip/mips-gic.h
index ad8b216b60566c53a304b7ac3604bb7b07bbc842..f0a60770d775a7957a99e3bdf5cfb8c811fba230 100644 (file)
--- a/include/linux/irqchip/mips-gic.h
+++ b/include/linux/irqchip/mips-gic.h
@@ -19,8 +19,6 @@
 #define GIC_REG(segment, offset) (segment##_##SECTION_OFS + offset##_##OFS)
 
 /* GIC Address Space */
-#define SHARED_SECTION_OFS             0x0000
-#define SHARED_SECTION_SIZE            0x8000
 #define VPE_LOCAL_SECTION_OFS          0x8000
 #define VPE_LOCAL_SECTION_SIZE         0x4000
 #define VPE_OTHER_SECTION_OFS          0xc000
@@ -28,15 +26,6 @@
 #define USM_VISIBLE_SECTION_OFS                0x10000
 #define USM_VISIBLE_SECTION_SIZE       0x10000
 
-/* Register Map for Shared Section */
-
-#define GIC_SH_CONFIG_OFS              0x0000
-
-#define GIC_SH_REVISIONID_OFS          0x0020
-
-/* Set/Clear corresponding bit in Edge Detect Register */
-#define GIC_SH_WEDGE_OFS               0x0280
-
 /* Register Map for Local Section */
 #define GIC_VPE_CTL_OFS                        0x0000
 #define GIC_VPE_PEND_OFS               0x0004
@@ -65,15 +54,6 @@
 #define GIC_UMV_SH_COUNTER_63_32_OFS   0x0004
 
 /* Masks */
-#define GIC_SH_CONFIG_NUMINTRS_SHF     16
-#define GIC_SH_CONFIG_NUMINTRS_MSK     (MSK(8) << GIC_SH_CONFIG_NUMINTRS_SHF)
-
-#define GIC_SH_CONFIG_NUMVPES_SHF      0
-#define GIC_SH_CONFIG_NUMVPES_MSK      (MSK(8) << GIC_SH_CONFIG_NUMVPES_SHF)
-
-#define GIC_SH_WEDGE_SET(intr)         ((intr) | (0x1 << 31))
-#define GIC_SH_WEDGE_CLR(intr)         ((intr) & ~(0x1 << 31))
-
 #define GIC_MAP_SHF                    0
 #define GIC_MAP_MSK                    (MSK(6) << GIC_MAP_SHF)